Skip to content

Commit eecaed6

Browse files
committed
[LivePhysRegs] Make use of MBB.liveouts() (semi-NFC)
This is done for consistency with LiveRegUnits (see llvm#154325). This is technically not an NFC, as `MBB.liveouts()` excludes runtime-defined liveins, but no users currently depend on this.
1 parent bfab808 commit eecaed6

File tree

3 files changed

+38
-22
lines changed

3 files changed

+38
-22
lines changed

llvm/include/llvm/CodeGen/LivePhysRegs.h

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -165,10 +165,17 @@ class LivePhysRegs {
165165
void dump() const;
166166

167167
private:
168+
/// Adds a register, taking the lane mask into consideration.
169+
void addRegMaskPair(const MachineBasicBlock::RegisterMaskPair &Pair);
170+
168171
/// Adds live-in registers from basic block \p MBB, taking associated
169172
/// lane masks into consideration.
170173
void addBlockLiveIns(const MachineBasicBlock &MBB);
171174

175+
/// Adds live-out registers from basic block \p MBB, taking associated
176+
/// lane masks into consideration.
177+
void addBlockLiveOuts(const MachineBasicBlock &MBB);
178+
172179
/// Adds pristine registers. Pristine registers are callee saved registers
173180
/// that are unused in the function.
174181
void addPristines(const MachineFunction &MF);

llvm/lib/CodeGen/LivePhysRegs.cpp

Lines changed: 29 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -151,23 +151,34 @@ bool LivePhysRegs::available(const MachineRegisterInfo &MRI,
151151
return true;
152152
}
153153

154+
/// Adds a register, taking associated lane masks into consideration.
155+
void LivePhysRegs::addRegMaskPair(
156+
const MachineBasicBlock::RegisterMaskPair &Pair) {
157+
MCRegister Reg = Pair.PhysReg;
158+
LaneBitmask Mask = Pair.LaneMask;
159+
MCSubRegIndexIterator S(Reg, TRI);
160+
assert(Mask.any() && "Invalid livein mask");
161+
if (Mask.all() || !S.isValid()) {
162+
addReg(Reg);
163+
return;
164+
}
165+
for (; S.isValid(); ++S) {
166+
unsigned SI = S.getSubRegIndex();
167+
if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any())
168+
addReg(S.getSubReg());
169+
}
170+
}
171+
154172
/// Add live-in registers of basic block \p MBB to \p LiveRegs.
155173
void LivePhysRegs::addBlockLiveIns(const MachineBasicBlock &MBB) {
156-
for (const auto &LI : MBB.liveins()) {
157-
MCRegister Reg = LI.PhysReg;
158-
LaneBitmask Mask = LI.LaneMask;
159-
MCSubRegIndexIterator S(Reg, TRI);
160-
assert(Mask.any() && "Invalid livein mask");
161-
if (Mask.all() || !S.isValid()) {
162-
addReg(Reg);
163-
continue;
164-
}
165-
for (; S.isValid(); ++S) {
166-
unsigned SI = S.getSubRegIndex();
167-
if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any())
168-
addReg(S.getSubReg());
169-
}
170-
}
174+
for (const auto &LI : MBB.liveins())
175+
addRegMaskPair(LI);
176+
}
177+
178+
/// Add live-out registers of basic block \p MBB to \p LiveRegs.
179+
void LivePhysRegs::addBlockLiveOuts(const MachineBasicBlock &MBB) {
180+
for (const auto &LO : MBB.liveouts())
181+
addRegMaskPair(LO);
171182
}
172183

173184
/// Adds all callee saved registers to \p LiveRegs.
@@ -207,9 +218,7 @@ void LivePhysRegs::addPristines(const MachineFunction &MF) {
207218
}
208219

209220
void LivePhysRegs::addLiveOutsNoPristines(const MachineBasicBlock &MBB) {
210-
// To get the live-outs we simply merge the live-ins of all successors.
211-
for (const MachineBasicBlock *Succ : MBB.successors())
212-
addBlockLiveIns(*Succ);
221+
addBlockLiveOuts(MBB);
213222
if (MBB.isReturnBlock()) {
214223
// Return blocks are a special case because we currently don't mark up
215224
// return instructions completely: specifically, there is no explicit
@@ -356,8 +365,8 @@ bool llvm::isPhysRegUsedAfter(Register Reg, MachineBasicBlock::iterator MBI) {
356365

357366
// If we hit the end of the block, check whether Reg is live into a
358367
// successor.
359-
for (MachineBasicBlock *Succ : MBB->successors())
360-
if (Succ->isLiveIn(Reg))
368+
for (const auto &LO : MBB->liveouts())
369+
if (LO.PhysReg == MCRegister(Reg) && LO.LaneMask.any())
361370
return true;
362371

363372
return false;

llvm/lib/CodeGen/LiveRegUnits.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -94,8 +94,8 @@ static void addBlockLiveIns(LiveRegUnits &LiveUnits,
9494
/// Add live-out registers of basic block \p MBB to \p LiveUnits.
9595
static void addBlockLiveOuts(LiveRegUnits &LiveUnits,
9696
const MachineBasicBlock &MBB) {
97-
for (const auto &LI : MBB.liveouts())
98-
LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
97+
for (const auto &LO : MBB.liveouts())
98+
LiveUnits.addRegMasked(LO.PhysReg, LO.LaneMask);
9999
}
100100

101101
/// Adds all callee saved registers to \p LiveUnits.

0 commit comments

Comments
 (0)