@@ -151,23 +151,34 @@ bool LivePhysRegs::available(const MachineRegisterInfo &MRI,
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return true ;
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}
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+ // / Adds a register, taking associated lane masks into consideration.
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+ void LivePhysRegs::addRegMaskPair (
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+ const MachineBasicBlock::RegisterMaskPair &Pair) {
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+ MCRegister Reg = Pair.PhysReg ;
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+ LaneBitmask Mask = Pair.LaneMask ;
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+ MCSubRegIndexIterator S (Reg, TRI);
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+ assert (Mask.any () && " Invalid livein mask" );
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+ if (Mask.all () || !S.isValid ()) {
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+ addReg (Reg);
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+ return ;
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+ }
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+ for (; S.isValid (); ++S) {
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+ unsigned SI = S.getSubRegIndex ();
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+ if ((Mask & TRI->getSubRegIndexLaneMask (SI)).any ())
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+ addReg (S.getSubReg ());
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+ }
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+ }
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+
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// / Add live-in registers of basic block \p MBB to \p LiveRegs.
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void LivePhysRegs::addBlockLiveIns (const MachineBasicBlock &MBB) {
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- for (const auto &LI : MBB.liveins ()) {
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- MCRegister Reg = LI.PhysReg ;
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- LaneBitmask Mask = LI.LaneMask ;
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- MCSubRegIndexIterator S (Reg, TRI);
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- assert (Mask.any () && " Invalid livein mask" );
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- if (Mask.all () || !S.isValid ()) {
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- addReg (Reg);
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- continue ;
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- }
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- for (; S.isValid (); ++S) {
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- unsigned SI = S.getSubRegIndex ();
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- if ((Mask & TRI->getSubRegIndexLaneMask (SI)).any ())
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- addReg (S.getSubReg ());
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- }
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- }
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+ for (const auto &LI : MBB.liveins ())
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+ addRegMaskPair (LI);
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+ }
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+
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+ // / Add live-out registers of basic block \p MBB to \p LiveRegs.
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+ void LivePhysRegs::addBlockLiveOuts (const MachineBasicBlock &MBB) {
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+ for (const auto &LO : MBB.liveouts ())
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+ addRegMaskPair (LO);
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}
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// / Adds all callee saved registers to \p LiveRegs.
@@ -207,9 +218,7 @@ void LivePhysRegs::addPristines(const MachineFunction &MF) {
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}
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void LivePhysRegs::addLiveOutsNoPristines (const MachineBasicBlock &MBB) {
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- // To get the live-outs we simply merge the live-ins of all successors.
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- for (const MachineBasicBlock *Succ : MBB.successors ())
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- addBlockLiveIns (*Succ);
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+ addBlockLiveOuts (MBB);
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if (MBB.isReturnBlock ()) {
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// Return blocks are a special case because we currently don't mark up
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// return instructions completely: specifically, there is no explicit
@@ -356,8 +365,8 @@ bool llvm::isPhysRegUsedAfter(Register Reg, MachineBasicBlock::iterator MBI) {
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// If we hit the end of the block, check whether Reg is live into a
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// successor.
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- for (MachineBasicBlock *Succ : MBB->successors ())
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- if (Succ-> isLiveIn (Reg))
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+ for (const auto &LO : MBB->liveouts ())
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+ if (LO. PhysReg == MCRegister (Reg) && LO. LaneMask . any ( ))
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return true ;
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return false ;
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