[libcpu-riscv]: [surpport SMP]: Add dynamic startup based on core configuration.

Fix issues with non-standard formatting

Signed-off-by: Mengchen Teng <[email protected]>

Author: Tm-C-mT

bsp/qemu-virt64-riscv/driver/board.c

@@ -88,7 +88,7 @@ void rt_hw_board_init(void)
 #endif /* RT_USING_CONSOLE */
 
     rt_hw_tick_init();
-    
+
 #ifdef RT_USING_SMP
     /* ipi init */
     rt_hw_ipi_init();

libcpu/risc-v/common64/cpuport.c

@@ -126,7 +126,7 @@ void rt_hw_context_switch_interrupt(rt_ubase_t from, rt_ubase_t to, rt_thread_t
 }
 #else
 void rt_hw_context_switch_interrupt(void *context, rt_ubase_t from, rt_ubase_t to, struct rt_thread *to_thread)
-{   
+{
     /* Perform architecture-specific context switch. This call will
      * restore the target thread context and should not return when a
      * switch is performed. The caller (scheduler) invoked this function
@@ -188,7 +188,7 @@ void secondary_cpu_entry(void)
     /* The PLIC peripheral interrupts are currently handled by the boot_hart. */
     /* Enable the Supervisor-Timer bit in SIE */
     rt_hw_tick_init();
-    
+
 #ifdef RT_USING_SMP
     /* ipi init */
     rt_hw_ipi_init();

libcpu/risc-v/virt64/interrupt.c

@@ -146,7 +146,6 @@ void rt_hw_spin_lock(rt_hw_spinlock_t *lock)
         if (owner == ticket)
             break;
         /* TODO: low-power wait for interrupt while spinning */
-        // __asm__ volatile("wfi" ::: "memory");
     }
 
     /* Ensure all following memory accesses are ordered after acquiring the lock */