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[libcpu][arm] fix: correct FPU stack initialization order and alignment on Cortex-A #10906
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👋 感谢您对 RT-Thread 的贡献!Thank you for your contribution to RT-Thread! 为确保代码符合 RT-Thread 的编码规范,请在你的仓库中执行以下步骤运行代码格式化工作流(如果格式化CI运行失败)。 🛠 操作步骤 | Steps
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libcpu/arm/cortex-a/stack.c
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| rt_uint8_t *stack_addr, void *texit) | ||
| { | ||
| rt_uint32_t *stk; | ||
| rt_uint32_t i = 0; |
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变量定义在这块会有ci报错
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已重新提交
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还是有问题呢,主要是FPU宏导致的,如果不使能相当于会有警告,在ci里面算错误,请修复
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已重新提交
| #endif | ||
| #ifdef RT_USING_FPU | ||
| *(--stk) = 0; /* not use fpu*/ | ||
| /* 1. D0-D15 */ |
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既然前面是赋值成0,那么使用memset设置到0吧。前面的i变量报错,是当FPU不定义时,i变量没使用,报警告了。(目前ci检查是非常严格的,警告做为错误处理)
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已提交。给变量i添加了宏定义
…nment for Cortex-A

拉取/合并请求描述:(PR description)
[
为什么提交这份PR (why to submit this PR)
修复了
libcpu/arm/cortex-a/common/stack.c中 FPU 上下文初始化顺序与汇编恢复顺序不一致的问题。原始实现的压栈顺序和栈对齐未与
context_gcc.S保持一致,导致在 -O2 优化、硬浮点 ABI (-mfloat-abi=hard) 环境下,执行包含浮点/NEON 指令的线程时出现 Data Abort 异常。
你的解决方案是什么 (what is your solution)
context_gcc.S的恢复顺序:D0–D15 → D16–D31 → FPSCR → FPEXC。
0x40000000) 以确保 FPU 处于启用状态。请提供验证的bsp和config (provide the config and bsp)
bsp/ft-m6678e(Cortex-A15 平台,基于 RT-Thread 5.1.0)测试验证 (testing and verification)
-O2 -Wall -mfloat-abi=hard -mfpu=neon-vfpv4sqrtf()调用。-O0) 与 Release 模式 (-O2) 均运行稳定;-fno-schedule-insns2workaround;影响范围 (impact scope)
RT_USING_FPU的 Cortex-A 系列处理器。后续计划 (follow-up)
]
当前拉取/合并请求的状态 Intent for your PR
必须选择一项 Choose one (Mandatory):
代码质量 Code Quality:
我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:
#if 0代码,不包含已经被注释了的代码 All redundant code is removed and cleaned up