In the Sail definition ("model/riscv_insts_base.sail"), the opcode encoding for "FENCE.I" is defined:

mapping clause encdec = FENCEI()
  <-> 0b000000000000 @ 0b00000 @ 0b001 @ 0b00000 @ 0b0001111

... every bit is constant.

But, the current RISC-V ISA specification (20191213) says:

The unused fields in the FENCE.I instruction, imm[11:0], rs1, and rd, are reserved for finer-grain fences in future extensions. For forward compatibility, base implementations shall ignore these fields, and standard software shall zero these fields.

There needs to be some way to know that for these fields, they are currently expected to be zero, but that may change in the future.

An example from a downstream project, "binutils", respects the reserved fields for the purposes of decode (in "include/opcode/riscv-opc.h"):

#define MASK_FENCE_I  0x707f

If the entire opcode was constant, the mask would be like "EBREAK" (and others):

#define MASK_EBREAK  0xffffffff