From 4ab657cf5920e3325aa6cb0bebf93b1f85878dad Mon Sep 17 00:00:00 2001 From: matei jordache Date: Sun, 25 Jun 2023 21:49:05 -0400 Subject: [PATCH 1/5] Prototype Alchitry IO shield board config. --- amaranth_boards/alchitry_io.py | 78 ++++++++++++++++++++++++++++++++++ 1 file changed, 78 insertions(+) create mode 100644 amaranth_boards/alchitry_io.py diff --git a/amaranth_boards/alchitry_io.py b/amaranth_boards/alchitry_io.py new file mode 100644 index 00000000..5ee5e283 --- /dev/null +++ b/amaranth_boards/alchitry_io.py @@ -0,0 +1,78 @@ +import os +import shutil +import subprocess + +from amaranth.build import * +from amaranth.vendor.lattice_ice40 import * +from amaranth_boards.alchitry_au import * +from amaranth_boards.alchitry_cu import * +from .resources import * + +__all__ = ["AlchitryCuIOPlatform"] + +class AlchitryCuIOPlatform(AlchitryCuPlatform): + resources = [ + *Display7SegResource(0, + a="3", b="4", c="18", d="19" + e="20", d="2", g="1", dp="17", + conn=("bank",0), invert=True, attrs="SB_LVCMOS" + ) + + # Not sure how to handle multiplex display.. + # Control line for anode are 21 22 5 6 [display 0-3] + Resource("anodes",0, + Subsignal("7seg_0", Pins("21", dir="o")), + Subsignal("7seg_1", Pins("22", dir="o")), + Subsignal("7seg_2", Pins("5", dir="o")), + Subsignal("7seg_3", Pins("6", dir="o")), + conn=("bank",0), invert=True, Attrs(IO_STANDARD="SB_LVCMOS") + ) + + # Kind of a weird hack because I want to use generic connector + # numbering but S5 is on a different connector than S1-4. + # I guess rely on user to pick these up and use the pinouts correctly + # in their application? Maybe they can just use something similar to + # get_all_resources from .test/blinky to get all the things. + *ButtonResources(0, + pins="31 32 15 16", conn=("bank",1), + invert=True, attrs="SB_LVCMOS" + ) + + *ButtonResources(1, + pins="18", conn=("bank",2), + invert=True, attrs="SB_LVCMOS" + ) + + #Same with the switches and LEDs. + *SwitchResources(0, + pins="23 24 25 26 27 28", conn=("bank",1), + invert=True, attrs="SB_LVCMOS" + ) + + *SwitchResources(1, + pins="31 32", conn=("bank",0), + invert=True, attrs="SB_LVCMOS" + ) + + *SwitchResources(2, + pins="17 18 19 20 21 22", conn=("bank",1), + invert=True, attrs="SB_LVCMOS" + ) + + *SwitchResources(3, + pins="23 24 25 26 27 28 29 30", conn=("bank",0), + invert=True, attrs="SB_LVCMOS" + ) + + # Total of 24 LED (3 banks of 8). Banks are split between connectors + # So no easy way to resolve. + *LEDResources(0, + pins="14 13 12 11 10 9 8 7 6 5 4 3 2 1", conn=("bank",1), + invert=True, attrs="SB_LVCMOS" + ) + + *LEDResources(1, + pins="16 15 14 13 12 11 10 9 8 7", conn=("bank",0), + invert=True, attrs="SB_LVCMOS" + ) + ] From 09dde8669b9cec6bd962ccef6cbde02106ac6252 Mon Sep 17 00:00:00 2001 From: matei jordache Date: Sun, 25 Jun 2023 21:58:01 -0400 Subject: [PATCH 2/5] missing comma --- amaranth_boards/alchitry_io.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/amaranth_boards/alchitry_io.py b/amaranth_boards/alchitry_io.py index 5ee5e283..c56d1eb8 100644 --- a/amaranth_boards/alchitry_io.py +++ b/amaranth_boards/alchitry_io.py @@ -13,7 +13,7 @@ class AlchitryCuIOPlatform(AlchitryCuPlatform): resources = [ *Display7SegResource(0, - a="3", b="4", c="18", d="19" + a="3", b="4", c="18", d="19", e="20", d="2", g="1", dp="17", conn=("bank",0), invert=True, attrs="SB_LVCMOS" ) From 3983d6a1876577763eefdf63b484fba6e6dbee98 Mon Sep 17 00:00:00 2001 From: matei jordache Date: Sun, 25 Jun 2023 21:59:36 -0400 Subject: [PATCH 3/5] more missing commas --- amaranth_boards/alchitry_io.py | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/amaranth_boards/alchitry_io.py b/amaranth_boards/alchitry_io.py index c56d1eb8..3711d8d6 100644 --- a/amaranth_boards/alchitry_io.py +++ b/amaranth_boards/alchitry_io.py @@ -16,7 +16,7 @@ class AlchitryCuIOPlatform(AlchitryCuPlatform): a="3", b="4", c="18", d="19", e="20", d="2", g="1", dp="17", conn=("bank",0), invert=True, attrs="SB_LVCMOS" - ) + ), # Not sure how to handle multiplex display.. # Control line for anode are 21 22 5 6 [display 0-3] @@ -26,7 +26,7 @@ class AlchitryCuIOPlatform(AlchitryCuPlatform): Subsignal("7seg_2", Pins("5", dir="o")), Subsignal("7seg_3", Pins("6", dir="o")), conn=("bank",0), invert=True, Attrs(IO_STANDARD="SB_LVCMOS") - ) + ), # Kind of a weird hack because I want to use generic connector # numbering but S5 is on a different connector than S1-4. @@ -36,40 +36,40 @@ class AlchitryCuIOPlatform(AlchitryCuPlatform): *ButtonResources(0, pins="31 32 15 16", conn=("bank",1), invert=True, attrs="SB_LVCMOS" - ) + ), *ButtonResources(1, pins="18", conn=("bank",2), invert=True, attrs="SB_LVCMOS" - ) + ), #Same with the switches and LEDs. *SwitchResources(0, pins="23 24 25 26 27 28", conn=("bank",1), invert=True, attrs="SB_LVCMOS" - ) + ), *SwitchResources(1, pins="31 32", conn=("bank",0), invert=True, attrs="SB_LVCMOS" - ) + ), *SwitchResources(2, pins="17 18 19 20 21 22", conn=("bank",1), invert=True, attrs="SB_LVCMOS" - ) + ), *SwitchResources(3, pins="23 24 25 26 27 28 29 30", conn=("bank",0), invert=True, attrs="SB_LVCMOS" - ) + ), # Total of 24 LED (3 banks of 8). Banks are split between connectors # So no easy way to resolve. *LEDResources(0, pins="14 13 12 11 10 9 8 7 6 5 4 3 2 1", conn=("bank",1), invert=True, attrs="SB_LVCMOS" - ) + ), *LEDResources(1, pins="16 15 14 13 12 11 10 9 8 7", conn=("bank",0), From eee96b3ccf0ccea35e41436af6ac24c0979adf87 Mon Sep 17 00:00:00 2001 From: matei jordache Date: Sun, 25 Jun 2023 22:01:04 -0400 Subject: [PATCH 4/5] typo in 7seg --- amaranth_boards/alchitry_io.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/amaranth_boards/alchitry_io.py b/amaranth_boards/alchitry_io.py index 3711d8d6..3afe2c51 100644 --- a/amaranth_boards/alchitry_io.py +++ b/amaranth_boards/alchitry_io.py @@ -14,7 +14,7 @@ class AlchitryCuIOPlatform(AlchitryCuPlatform): resources = [ *Display7SegResource(0, a="3", b="4", c="18", d="19", - e="20", d="2", g="1", dp="17", + e="20", f="2", g="1", dp="17", conn=("bank",0), invert=True, attrs="SB_LVCMOS" ), From 4fdf642600716106377ddfa00d8f29380e4234f9 Mon Sep 17 00:00:00 2001 From: matei jordache Date: Sun, 25 Jun 2023 22:04:16 -0400 Subject: [PATCH 5/5] rid attrs on Resource --- amaranth_boards/alchitry_io.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/amaranth_boards/alchitry_io.py b/amaranth_boards/alchitry_io.py index 3afe2c51..9d14e517 100644 --- a/amaranth_boards/alchitry_io.py +++ b/amaranth_boards/alchitry_io.py @@ -25,7 +25,7 @@ class AlchitryCuIOPlatform(AlchitryCuPlatform): Subsignal("7seg_1", Pins("22", dir="o")), Subsignal("7seg_2", Pins("5", dir="o")), Subsignal("7seg_3", Pins("6", dir="o")), - conn=("bank",0), invert=True, Attrs(IO_STANDARD="SB_LVCMOS") + conn=("bank",0), invert=True ), # Kind of a weird hack because I want to use generic connector