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Add ADAQ23878 dts. Fix osc freq for ADAQ23875
Will squash after review. Signed-off-by: Iulia Moldovan <[email protected]>
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arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23875.dts

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Analog Devices LTC2387-16/ADAQ23875
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* Analog Devices ADAQ23875/LTC2387-16
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*
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* hdl_project: <cn0577/zed with make parameter ADC_RES=16>
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* hdl_project: <adaq2387x/zed with make parameter ADC_RES=16>
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* for all config modes, please check the README of the HDL project
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* board_revision: <A>
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*
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ext_clk: clock@0 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <120000000>;
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clock-frequency = <100000000>;
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};
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};
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gpio-control@0 {
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Analog Devices ADAQ23878
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*
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* hdl_project: <adaq2387x/zed>
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* for all config modes, please check the README of the HDL project
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* board_revision: <A>
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*
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* Copyright (C) 2022 - 2025 Analog Devices Inc.
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*/
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/dts-v1/;
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#include "zynq-zed.dtsi"
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#include "zynq-zed-adv7511.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/pwm/pwm.h>
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/ {
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vref: regulator-vref {
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compatible = "regulator-fixed";
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regulator-name = "fixed-supply";
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regulator-min-microvolt = <4096000>;
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regulator-max-microvolt = <4096000>;
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regulator-always-on;
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};
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clocks {
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ext_clk: clock@0 {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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};
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};
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gpio-control@0 {
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compatible = "adi,one-bit-adc-dac";
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#address-cells = <1>;
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#size-cells = <0>;
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out-gpios = <&gpio0 86 GPIO_ACTIVE_HIGH>,
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<&gpio0 87 GPIO_ACTIVE_HIGH>;
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channel@0 {
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reg = <0>;
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label = "adaq23878_testpat";
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};
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channel@1 {
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reg = <1>;
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label = "adaq23878_pd";
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};
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};
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};
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&fpga_axi {
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rx_dma: dma-controller@44a30000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x44a30000 0x1000>;
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#dma-cells = <1>;
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interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clkc 15>;
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adi,channels {
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#size-cells = <0>;
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#address-cells = <1>;
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dma-channel@0 {
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reg = <0>;
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adi,source-bus-width = <32>;
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adi,source-bus-type = <2>;
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adi,destination-bus-width = <64>;
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adi,destination-bus-type = <0>;
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};
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};
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};
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axi_pwm_gen: pwm@44a60000 {
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compatible = "adi,axi-pwmgen-2.00.a";
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reg = <0x44a60000 0x1000>;
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label = "adaq23878_if";
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#pwm-cells = <2>;
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clocks = <&clkc 15>, <&ext_clk>;
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clock-names = "axi", "ext";
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};
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adaq23878@0{
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compatible = "adaq23878";
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clocks = <&ext_clk>;
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dmas = <&rx_dma 0>;
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dma-names = "rx";
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pwms = <&axi_pwm_gen 0 0
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&axi_pwm_gen 1 0>;
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pwm-names = "cnv", "clk_en";
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vref-supply = <&vref>;
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// uncomment the below command to use in one lane mode
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// adi,use-one-lane;
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};
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};

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