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Update uart_register.h
From https://github.com/espressif/ESP8266_RTOS_SDK/blob/07d80fa96d24f3a44c3e5bfe2792a1f40fcb92db/components/esp8266/include/esp8266/uart_register.h
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‎platforms/esp8266/include/esp_uart_register.h‎

Lines changed: 187 additions & 136 deletions
Original file line numberDiff line numberDiff line change
@@ -1,136 +1,187 @@
1-
/* clang-format off */
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/*
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* Copyright (c) 2010 - 2011 Espressif System
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*
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*/
6-
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#ifndef CS_COMMON_PLATFORMS_ESP8266_UART_REGISTER_H_
8-
#define CS_COMMON_PLATFORMS_ESP8266_UART_REGISTER_H_
9-
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#define REG_UART_BASE(i) (0x60000000 + (i)*0xf00)
11-
//version value:32'h062000
12-
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#define UART_FIFO(i) (REG_UART_BASE(i) + 0x0)
14-
#define UART_RXFIFO_RD_BYTE 0x000000FF
15-
#define UART_RXFIFO_RD_BYTE_S 0
16-
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#define UART_INT_RAW(i) (REG_UART_BASE(i) + 0x4)
18-
#define UART_RXFIFO_TOUT_INT_RAW (BIT(8))
19-
#define UART_BRK_DET_INT_RAW (BIT(7))
20-
#define UART_CTS_CHG_INT_RAW (BIT(6))
21-
#define UART_DSR_CHG_INT_RAW (BIT(5))
22-
#define UART_RXFIFO_OVF_INT_RAW (BIT(4))
23-
#define UART_FRM_ERR_INT_RAW (BIT(3))
24-
#define UART_PARITY_ERR_INT_RAW (BIT(2))
25-
#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1))
26-
#define UART_RXFIFO_FULL_INT_RAW (BIT(0))
27-
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#define UART_INT_ST(i) (REG_UART_BASE(i) + 0x8)
29-
#define UART_RXFIFO_TOUT_INT_ST (BIT(8))
30-
#define UART_BRK_DET_INT_ST (BIT(7))
31-
#define UART_CTS_CHG_INT_ST (BIT(6))
32-
#define UART_DSR_CHG_INT_ST (BIT(5))
33-
#define UART_RXFIFO_OVF_INT_ST (BIT(4))
34-
#define UART_FRM_ERR_INT_ST (BIT(3))
35-
#define UART_PARITY_ERR_INT_ST (BIT(2))
36-
#define UART_TXFIFO_EMPTY_INT_ST (BIT(1))
37-
#define UART_RXFIFO_FULL_INT_ST (BIT(0))
38-
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#define UART_INT_ENA(i) (REG_UART_BASE(i) + 0xC)
40-
#define UART_RXFIFO_TOUT_INT_ENA (BIT(8))
41-
#define UART_BRK_DET_INT_ENA (BIT(7))
42-
#define UART_CTS_CHG_INT_ENA (BIT(6))
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#define UART_DSR_CHG_INT_ENA (BIT(5))
44-
#define UART_RXFIFO_OVF_INT_ENA (BIT(4))
45-
#define UART_FRM_ERR_INT_ENA (BIT(3))
46-
#define UART_PARITY_ERR_INT_ENA (BIT(2))
47-
#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1))
48-
#define UART_RXFIFO_FULL_INT_ENA (BIT(0))
49-
50-
#define UART_INT_CLR(i) (REG_UART_BASE(i) + 0x10)
51-
#define UART_RXFIFO_TOUT_INT_CLR (BIT(8))
52-
#define UART_BRK_DET_INT_CLR (BIT(7))
53-
#define UART_CTS_CHG_INT_CLR (BIT(6))
54-
#define UART_DSR_CHG_INT_CLR (BIT(5))
55-
#define UART_RXFIFO_OVF_INT_CLR (BIT(4))
56-
#define UART_FRM_ERR_INT_CLR (BIT(3))
57-
#define UART_PARITY_ERR_INT_CLR (BIT(2))
58-
#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1))
59-
#define UART_RXFIFO_FULL_INT_CLR (BIT(0))
60-
61-
#define UART_CLKDIV(i) (REG_UART_BASE(i) + 0x14)
62-
#define UART_CLKDIV_CNT 0x000FFFFF
63-
#define UART_CLKDIV_S 0
64-
65-
#define UART_AUTOBAUD(i) (REG_UART_BASE(i) + 0x18)
66-
#define UART_GLITCH_FILT 0x000000FF
67-
#define UART_GLITCH_FILT_S 8
68-
#define UART_AUTOBAUD_EN (BIT(0))
69-
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#define UART_STATUS(i) (REG_UART_BASE(i) + 0x1C)
71-
#define UART_TXD (BIT(31))
72-
#define UART_RTSN (BIT(30))
73-
#define UART_DTRN (BIT(29))
74-
#define UART_TXFIFO_CNT 0x000000FF
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#define UART_TXFIFO_CNT_S 16
76-
#define UART_RXD (BIT(15))
77-
#define UART_CTSN (BIT(14))
78-
#define UART_DSRN (BIT(13))
79-
#define UART_RXFIFO_CNT 0x000000FF
80-
#define UART_RXFIFO_CNT_S 0
81-
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#define UART_CONF0(i) (REG_UART_BASE(i) + 0x20)
83-
#define UART_DTR_INV (BIT(24))
84-
#define UART_RTS_INV (BIT(23))
85-
#define UART_TXD_INV (BIT(22))
86-
#define UART_DSR_INV (BIT(21))
87-
#define UART_CTS_INV (BIT(20))
88-
#define UART_RXD_INV (BIT(19))
89-
#define UART_TXFIFO_RST (BIT(18))
90-
#define UART_RXFIFO_RST (BIT(17))
91-
#define UART_IRDA_EN (BIT(16))
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#define UART_TX_FLOW_EN (BIT(15))
93-
#define UART_LOOPBACK (BIT(14))
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#define UART_IRDA_RX_INV (BIT(13))
95-
#define UART_IRDA_TX_INV (BIT(12))
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#define UART_IRDA_WCTL (BIT(11))
97-
#define UART_IRDA_TX_EN (BIT(10))
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#define UART_IRDA_DPLX (BIT(9))
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#define UART_TXD_BRK (BIT(8))
100-
#define UART_SW_DTR (BIT(7))
101-
#define UART_SW_RTS (BIT(6))
102-
#define UART_STOP_BIT_NUM 0x00000003
103-
#define UART_STOP_BIT_NUM_S 4
104-
#define UART_BIT_NUM 0x00000003
105-
#define UART_BIT_NUM_S 2
106-
#define UART_PARITY_EN (BIT(1))
107-
#define UART_PARITY (BIT(0))
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#define UART_CONF1(i) (REG_UART_BASE(i) + 0x24)
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#define UART_RX_TOUT_EN (BIT(31))
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#define UART_RX_TOUT_THRHD 0x0000007F
112-
#define UART_RX_TOUT_THRHD_S 24
113-
#define UART_RX_FLOW_EN (BIT(23))
114-
#define UART_RX_FLOW_THRHD 0x0000007F
115-
#define UART_RX_FLOW_THRHD_S 16
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#define UART_TXFIFO_EMPTY_THRHD 0x0000007F
117-
#define UART_TXFIFO_EMPTY_THRHD_S 8
118-
#define UART_RXFIFO_FULL_THRHD 0x0000007F
119-
#define UART_RXFIFO_FULL_THRHD_S 0
120-
121-
#define UART_LOWPULSE(i) (REG_UART_BASE(i) + 0x28)
122-
#define UART_LOWPULSE_MIN_CNT 0x000FFFFF
123-
#define UART_LOWPULSE_MIN_CNT_S 0
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125-
#define UART_HIGHPULSE(i) (REG_UART_BASE(i) + 0x2C)
126-
#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF
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#define UART_HIGHPULSE_MIN_CNT_S 0
128-
129-
#define UART_PULSE_NUM(i) (REG_UART_BASE(i) + 0x30)
130-
#define UART_PULSE_NUM_CNT 0x0003FF
131-
#define UART_PULSE_NUM_CNT_S 0
132-
133-
#define UART_DATE(i) (REG_UART_BASE(i) + 0x78)
134-
#define UART_ID(i) (REG_UART_BASE(i) + 0x7C)
135-
136-
#endif /* CS_COMMON_PLATFORMS_ESP8266_UART_REGISTER_H_ */
1+
// Copyright 2018-2025 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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// clang-format: off
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#pragma once
18+
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define REG_UART_BASE(i) (0x60000000 + (i)*0xf00)
24+
//version value:32'h062000
25+
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#define UART_FIFO(i) (REG_UART_BASE(i) + 0x0)
27+
#define UART_RXFIFO_RD_BYTE 0x000000FF
28+
#define UART_RXFIFO_RD_BYTE_S 0
29+
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#define UART_INT_RAW(i) (REG_UART_BASE(i) + 0x4)
31+
#define UART_RXFIFO_TOUT_INT_RAW (BIT(8))
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#define UART_BRK_DET_INT_RAW (BIT(7))
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#define UART_CTS_CHG_INT_RAW (BIT(6))
34+
#define UART_DSR_CHG_INT_RAW (BIT(5))
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#define UART_RXFIFO_OVF_INT_RAW (BIT(4))
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#define UART_FRM_ERR_INT_RAW (BIT(3))
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#define UART_PARITY_ERR_INT_RAW (BIT(2))
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#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1))
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#define UART_RXFIFO_FULL_INT_RAW (BIT(0))
40+
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#define UART_INT_ST(i) (REG_UART_BASE(i) + 0x8)
42+
#define UART_RXFIFO_TOUT_INT_ST (BIT(8))
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#define UART_BRK_DET_INT_ST (BIT(7))
44+
#define UART_CTS_CHG_INT_ST (BIT(6))
45+
#define UART_DSR_CHG_INT_ST (BIT(5))
46+
#define UART_RXFIFO_OVF_INT_ST (BIT(4))
47+
#define UART_FRM_ERR_INT_ST (BIT(3))
48+
#define UART_PARITY_ERR_INT_ST (BIT(2))
49+
#define UART_TXFIFO_EMPTY_INT_ST (BIT(1))
50+
#define UART_RXFIFO_FULL_INT_ST (BIT(0))
51+
52+
#define UART_INT_ENA(i) (REG_UART_BASE(i) + 0xC)
53+
#define UART_RXFIFO_TOUT_INT_ENA (BIT(8))
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#define UART_BRK_DET_INT_ENA (BIT(7))
55+
#define UART_CTS_CHG_INT_ENA (BIT(6))
56+
#define UART_DSR_CHG_INT_ENA (BIT(5))
57+
#define UART_RXFIFO_OVF_INT_ENA (BIT(4))
58+
#define UART_FRM_ERR_INT_ENA (BIT(3))
59+
#define UART_PARITY_ERR_INT_ENA (BIT(2))
60+
#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1))
61+
#define UART_RXFIFO_FULL_INT_ENA (BIT(0))
62+
63+
#define UART_INT_CLR(i) (REG_UART_BASE(i) + 0x10)
64+
#define UART_RXFIFO_TOUT_INT_CLR (BIT(8))
65+
#define UART_BRK_DET_INT_CLR (BIT(7))
66+
#define UART_CTS_CHG_INT_CLR (BIT(6))
67+
#define UART_DSR_CHG_INT_CLR (BIT(5))
68+
#define UART_RXFIFO_OVF_INT_CLR (BIT(4))
69+
#define UART_FRM_ERR_INT_CLR (BIT(3))
70+
#define UART_PARITY_ERR_INT_CLR (BIT(2))
71+
#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1))
72+
#define UART_RXFIFO_FULL_INT_CLR (BIT(0))
73+
74+
#define UART_RXFIFO_FULL_INT_ENA (BIT(0))
75+
#define UART_RXFIFO_FULL_INT_ENA_M (BIT(0))
76+
#define UART_RXFIFO_FULL_INT_ST_M (BIT(0))
77+
#define UART_RXFIFO_FULL_INT_CLR_M (BIT(0))
78+
79+
#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1))
80+
#define UART_TXFIFO_EMPTY_INT_ENA_M (BIT(1))
81+
#define UART_TXFIFO_EMPTY_INT_ST_M (BIT(1))
82+
#define UART_TXFIFO_EMPTY_INT_CLR_M (BIT(1))
83+
84+
#define UART_PARITY_ERR_INT_ENA (BIT(2))
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#define UART_PARITY_ERR_INT_ENA_M (BIT(2))
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#define UART_PARITY_ERR_INT_ST_M (BIT(2))
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#define UART_PARITY_ERR_INT_CLR_M (BIT(2))
88+
89+
#define UART_FRM_ERR_INT_ENA (BIT(3))
90+
#define UART_FRM_ERR_INT_ENA_M (BIT(3))
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#define UART_FRM_ERR_INT_ST_M (BIT(3))
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#define UART_FRM_ERR_INT_CLR_M (BIT(3))
93+
94+
#define UART_RXFIFO_OVF_INT_ENA (BIT(4))
95+
#define UART_RXFIFO_OVF_INT_ENA_M (BIT(4))
96+
#define UART_RXFIFO_OVF_INT_ST_M (BIT(4))
97+
#define UART_RXFIFO_OVF_INT_CLR_M (BIT(4))
98+
99+
#define UART_RXFIFO_TOUT_INT_ENA (BIT(8))
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#define UART_RXFIFO_TOUT_INT_ENA_M (BIT(8))
101+
#define UART_RXFIFO_TOUT_INT_ST_M (BIT(8))
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#define UART_RXFIFO_TOUT_INT_CLR_M (BIT(8))
103+
104+
#define UART_CLKDIV(i) (REG_UART_BASE(i) + 0x14)
105+
#define UART_CLKDIV_CNT 0x000FFFFF
106+
#define UART_CLKDIV_S 0
107+
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#define UART_AUTOBAUD(i) (REG_UART_BASE(i) + 0x18)
109+
#define UART_GLITCH_FILT 0x000000FF
110+
#define UART_GLITCH_FILT_S 8
111+
#define UART_AUTOBAUD_EN (BIT(0))
112+
113+
#define UART_STATUS(i) (REG_UART_BASE(i) + 0x1C)
114+
#define UART_TXD (BIT(31))
115+
#define UART_RTSN (BIT(30))
116+
#define UART_DTRN (BIT(29))
117+
#define UART_TXFIFO_CNT 0x000000FF
118+
#define UART_TXFIFO_CNT_S 16
119+
#define UART_RXD (BIT(15))
120+
#define UART_CTSN (BIT(14))
121+
#define UART_DSRN (BIT(13))
122+
#define UART_RXFIFO_CNT 0x000000FF
123+
#define UART_RXFIFO_CNT_S 0
124+
125+
#define UART_CONF0(i) (REG_UART_BASE(i) + 0x20)
126+
#define UART_DTR_INV (BIT(24))
127+
#define UART_RTS_INV (BIT(23))
128+
#define UART_TXD_INV (BIT(22))
129+
#define UART_DSR_INV (BIT(21))
130+
#define UART_CTS_INV (BIT(20))
131+
#define UART_RXD_INV (BIT(19))
132+
#define UART_TXFIFO_RST (BIT(18))
133+
#define UART_RXFIFO_RST (BIT(17))
134+
#define UART_IRDA_EN (BIT(16))
135+
#define UART_TX_FLOW_EN (BIT(15))
136+
#define UART_LOOPBACK (BIT(14))
137+
#define UART_IRDA_RX_INV (BIT(13))
138+
#define UART_IRDA_TX_INV (BIT(12))
139+
#define UART_IRDA_WCTL (BIT(11))
140+
#define UART_IRDA_TX_EN (BIT(10))
141+
#define UART_IRDA_DPLX (BIT(9))
142+
#define UART_TXD_BRK (BIT(8))
143+
#define UART_SW_DTR (BIT(7))
144+
#define UART_SW_RTS (BIT(6))
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#define UART_STOP_BIT_NUM 0x00000003
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#define UART_STOP_BIT_NUM_S 4
147+
#define UART_BIT_NUM 0x00000003
148+
#define UART_BIT_NUM_S 2
149+
#define UART_PARITY_EN (BIT(1))
150+
#define UART_PARITY_EN_M 0x00000001
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#define UART_PARITY_EN_S 1
152+
#define UART_PARITY (BIT(0))
153+
#define UART_PARITY_M 0x00000001
154+
#define UART_PARITY_S 0
155+
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#define UART_CONF1(i) (REG_UART_BASE(i) + 0x24)
157+
#define UART_RX_TOUT_EN (BIT(31))
158+
#define UART_RX_TOUT_THRHD 0x0000007F
159+
#define UART_RX_TOUT_THRHD_S 24
160+
#define UART_RX_FLOW_EN (BIT(23))
161+
#define UART_RX_FLOW_THRHD 0x0000007F
162+
#define UART_RX_FLOW_THRHD_S 16
163+
#define UART_TXFIFO_EMPTY_THRHD 0x0000007F
164+
#define UART_TXFIFO_EMPTY_THRHD_S 8
165+
#define UART_RXFIFO_FULL_THRHD 0x0000007F
166+
#define UART_RXFIFO_FULL_THRHD_S 0
167+
168+
#define UART_LOWPULSE(i) (REG_UART_BASE(i) + 0x28)
169+
#define UART_LOWPULSE_MIN_CNT 0x000FFFFF
170+
#define UART_LOWPULSE_MIN_CNT_S 0
171+
172+
#define UART_HIGHPULSE(i) (REG_UART_BASE(i) + 0x2C)
173+
#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF
174+
#define UART_HIGHPULSE_MIN_CNT_S 0
175+
176+
#define UART_PULSE_NUM(i) (REG_UART_BASE(i) + 0x30)
177+
#define UART_PULSE_NUM_CNT 0x0003FF
178+
#define UART_PULSE_NUM_CNT_S 0
179+
180+
#define UART_DATE(i) (REG_UART_BASE(i) + 0x78)
181+
#define UART_ID(i) (REG_UART_BASE(i) + 0x7C)
182+
183+
#define UART_SWAP_REG 0x3FF00028
184+
185+
#ifdef __cplusplus
186+
}
187+
#endif /* end of __cplusplus */

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