diff --git a/tests/designs/murax/CMakeLists.txt b/tests/designs/murax/CMakeLists.txt index 9d2b6ca..28e616e 100644 --- a/tests/designs/murax/CMakeLists.txt +++ b/tests/designs/murax/CMakeLists.txt @@ -1,41 +1,19 @@ set(murax ${CMAKE_SOURCE_DIR}/third_party/murax/Murax.v) -add_generic_test( - name murax - board_list basys3 xc7vx980t_board - top toplevel - sources basys3_toplevel.v - absolute_sources ${murax} -) +function(murax board) + add_generic_test( + name murax + board_list ${board} + top toplevel + sources ${board}_toplevel.v + absolute_sources ${murax} + ) +endfunction() -add_generic_test( - name murax - board_list arty35t - top toplevel - sources arty35t_toplevel.v - absolute_sources ${murax} -) - -add_generic_test( - name murax - board_list arty_s7_50 - top toplevel - sources arty_s7_50_toplevel.v - absolute_sources ${murax} -) - -add_generic_test( - name murax - board_list lifcl40evn - top toplevel - sources lifcl40evn_toplevel.v - absolute_sources ${murax} -) - -add_generic_test( - name murax - board_list xc7k70t_board - top toplevel - sources xc7k70t_board_toplevel.v - absolute_sources ${murax} -) +murax(basys3) +murax(arty35t) +murax(arty_s7_50) +murax(lifcl40evn) +murax(xc7k70t_board) +murax(xc7vx980t_board) +murax(zcu104) diff --git a/tests/designs/murax/xc7k480t_board.xdc b/tests/designs/murax/xc7k480t_board.xdc deleted file mode 100644 index 2565499..0000000 --- a/tests/designs/murax/xc7k480t_board.xdc +++ /dev/null @@ -1,84 +0,0 @@ -# Fake pinout for FFG901 package - -# Bank 18 -set_property PACKAGE_PIN F30 [get_ports io_mainClk] - -# Bank 18 -set_property PACKAGE_PIN G30 [get_ports io_uart_txd] -set_property PACKAGE_PIN H30 [get_ports io_uart_rxd] - -# Bank 18 -set_property PACKAGE_PIN A14 [get_ports sw[0]] -set_property PACKAGE_PIN A15 [get_ports sw[1]] -set_property PACKAGE_PIN A16 [get_ports sw[2]] -set_property PACKAGE_PIN A17 [get_ports sw[3]] -set_property PACKAGE_PIN B14 [get_ports sw[4]] -set_property PACKAGE_PIN B15 [get_ports sw[5]] -set_property PACKAGE_PIN B17 [get_ports sw[6]] -set_property PACKAGE_PIN C14 [get_ports sw[7]] -set_property PACKAGE_PIN C15 [get_ports sw[8]] -set_property PACKAGE_PIN C16 [get_ports sw[9]] -set_property PACKAGE_PIN C17 [get_ports sw[10]] -set_property PACKAGE_PIN D14 [get_ports sw[11]] -set_property PACKAGE_PIN D16 [get_ports sw[12]] -set_property PACKAGE_PIN D17 [get_ports sw[13]] -set_property PACKAGE_PIN E14 [get_ports sw[14]] -set_property PACKAGE_PIN E15 [get_ports sw[15]] - -# Bank 17 -set_property PACKAGE_PIN A25 [get_ports io_led[0]] -set_property PACKAGE_PIN A26 [get_ports io_led[1]] -set_property PACKAGE_PIN A27 [get_ports io_led[2]] -set_property PACKAGE_PIN A28 [get_ports io_led[3]] -set_property PACKAGE_PIN A30 [get_ports io_led[4]] -set_property PACKAGE_PIN B24 [get_ports io_led[5]] -set_property PACKAGE_PIN B25 [get_ports io_led[6]] -set_property PACKAGE_PIN B27 [get_ports io_led[7]] -set_property PACKAGE_PIN B28 [get_ports io_led[8]] -set_property PACKAGE_PIN B29 [get_ports io_led[9]] -set_property PACKAGE_PIN B30 [get_ports io_led[10]] -set_property PACKAGE_PIN C24 [get_ports io_led[11]] -set_property PACKAGE_PIN C25 [get_ports io_led[12]] -set_property PACKAGE_PIN C26 [get_ports io_led[13]] -set_property PACKAGE_PIN C27 [get_ports io_led[14]] -set_property PACKAGE_PIN C29 [get_ports io_led[15]] - - -set_property IOSTANDARD LVCMOS33 [get_ports io_mainClk] - -set_property IOSTANDARD LVCMOS33 [get_ports io_uart_txd] -set_property IOSTANDARD LVCMOS33 [get_ports io_uart_rxd] - -set_property IOSTANDARD LVCMOS33 [get_ports sw[0]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[1]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[2]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[3]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[4]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[5]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[6]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[7]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[8]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[9]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[10]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[11]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[12]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[13]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[14]] -set_property IOSTANDARD LVCMOS33 [get_ports sw[15]] - -set_property IOSTANDARD LVCMOS33 [get_ports io_led[0]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[1]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[2]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[3]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[4]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[5]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[6]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[7]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[8]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[9]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[10]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[11]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[12]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[13]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[14]] -set_property IOSTANDARD LVCMOS33 [get_ports io_led[15]] diff --git a/tests/designs/murax/xc7vx980t_board_toplevel.v b/tests/designs/murax/xc7vx980t_board_toplevel.v new file mode 100644 index 0000000..b10ca4d --- /dev/null +++ b/tests/designs/murax/xc7vx980t_board_toplevel.v @@ -0,0 +1,45 @@ +// Copyright (C) 2021 The Symbiflow Authors. +// +// Use of this source code is governed by a ISC-style +// license that can be found in the LICENSE file or at +// https://opensource.org/licenses/ISC +// +// SPDX-License-Identifier: ISC + +`timescale 1ns / 1ps + +module toplevel( + input io_mainClk, + output io_uart_txd, + input io_uart_rxd, + input [15:0] sw, + output [15:0] io_led + ); + + wire [31:0] io_gpioA_read; + wire [31:0] io_gpioA_write; + wire [31:0] io_gpioA_writeEnable; + wire io_mainClk; + wire io_jtag_tck; + wire io_jtag_tdi; + wire io_jtag_tdo; + wire io_jtag_tms; + wire io_uart_txd; + wire io_uart_rxd; + + assign io_led = io_gpioA_write[15: 0]; + assign io_gpioA_read[15:0] = sw; + + Murax murax ( + .io_asyncReset(0), + .io_mainClk (io_mainClk ), + .io_jtag_tck(1'b0), + .io_jtag_tdi(1'b0), + .io_jtag_tms(1'b0), + .io_gpioA_read (io_gpioA_read), + .io_gpioA_write (io_gpioA_write), + .io_gpioA_writeEnable(io_gpioA_writeEnable), + .io_uart_txd(io_uart_txd), + .io_uart_rxd(io_uart_rxd) + ); +endmodule diff --git a/tests/designs/murax/zcu104.xdc b/tests/designs/murax/zcu104.xdc new file mode 100644 index 0000000..dcdd1a6 --- /dev/null +++ b/tests/designs/murax/zcu104.xdc @@ -0,0 +1,25 @@ +## basys3 breakout board + +# Differential Clock +set_property PACKAGE_PIN F23 [get_ports clk_p] +set_property PACKAGE_PIN E23 [get_ports clk_n] + +set_property IOSTANDARD LVDS [get_ports clk_p] + +# Leds +set_property PACKAGE_PIN D5 [get_ports io_led[0]] +set_property PACKAGE_PIN D6 [get_ports io_led[1]] +set_property PACKAGE_PIN A5 [get_ports io_led[2]] +set_property PACKAGE_PIN B5 [get_ports io_led[3]] + +set_property IOSTANDARD LVCMOS33 [get_ports io_led[0]] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[1]] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[2]] +set_property IOSTANDARD LVCMOS33 [get_ports io_led[3]] + +# Serial +set_property LOC C19 [get_ports {io_uart_txd}] +set_property IOSTANDARD LVCMOS18 [get_ports {io_uart_txd}] + +set_property LOC A20 [get_ports {io_uart_rxd}] +set_property IOSTANDARD LVCMOS18 [get_ports {io_uart_rxd}] diff --git a/tests/designs/murax/zcu104_toplevel.v b/tests/designs/murax/zcu104_toplevel.v new file mode 100644 index 0000000..5112c9e --- /dev/null +++ b/tests/designs/murax/zcu104_toplevel.v @@ -0,0 +1,48 @@ +// Copyright (C) 2021 The Symbiflow Authors. +// +// Use of this source code is governed by a ISC-style +// license that can be found in the LICENSE file or at +// https://opensource.org/licenses/ISC +// +// SPDX-License-Identifier: ISC + +`timescale 1ns / 1ps + +module toplevel( + input clk_p, + input clk_n, + + output [3:0] io_led, + + input io_uart_rxd, + output io_uart_txd + ); + + wire [31:0] io_gpioA_write; + wire [31:0] io_gpioA_writeEnable; + wire io_mainClk; + wire io_uart_txd; + wire io_uart_rxd; + + assign io_led = io_gpioA_write[3: 0]; + + wire clk; + IBUFDS ibuf_ds (.I(clk_p), .IB(clk_n), .O(clk)); + + wire clk_bufg; + BUFGCE bufg (.I(clk), .CE(1'b1), .O(clk_bufg)); + + Murax murax ( + .io_asyncReset(0), + .io_mainClk (clk_bufg), + .io_jtag_tck(1'b0), + .io_jtag_tdi(1'b0), + .io_jtag_tms(1'b0), + .io_gpioA_read (8'b0), + .io_gpioA_write (io_gpioA_write), + .io_gpioA_writeEnable(io_gpioA_writeEnable), + .io_uart_txd(io_uart_txd), + .io_uart_rxd(io_uart_rxd) + ); +endmodule +