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kroeningkroening
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Verilog: add attributes into parse tree
Verilog allows attributes (key-value pairs) in various parts of the grammar. These are now added to the generated parse tree.
1 parent bbdb0b1 commit bc61679

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2 files changed

+87
-33
lines changed

2 files changed

+87
-33
lines changed

‎src/hw_cbmc_irep_ids.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -164,6 +164,7 @@ IREP_ID_ONE(pullup)
164164
IREP_ID_ONE(inst_builtin)
165165
IREP_ID_ONE(pulldown)
166166
IREP_ID_ONE(verilog_attribute)
167+
IREP_ID_ONE(verilog_attributes)
167168
IREP_ID_ONE(task)
168169
IREP_ID_ONE(trior)
169170
IREP_ID_ONE(wor)

‎src/verilog/parser.y‎

Lines changed: 86 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -157,6 +157,25 @@ static void add_as_subtype(typet &dest, typet &what)
157157

158158
/*******************************************************************\
159159
160+
Function: add_attributes
161+
162+
Inputs:
163+
164+
Outputs:
165+
166+
Purpose:
167+
168+
\*******************************************************************/
169+
170+
static void add_attributes(YYSTYPE &dest, YYSTYPE &attributes)
171+
{
172+
PRECONDITION(stack_expr(attributes).id() == ID_verilog_attributes);
173+
if(!stack_expr(attributes).get_sub().empty())
174+
addswap(dest, ID_verilog_attributes, attributes);
175+
}
176+
177+
/*******************************************************************\
178+
160179
Function: yyverilogerror
161180
162181
Inputs:
@@ -596,7 +615,8 @@ description:
596615
| program_declaration
597616
| package_declaration
598617
| attribute_instance_brace package_item
599-
{ PARSER.parse_tree.create_package_item(stack_expr($2)); }
618+
{ add_attributes($2, $1);
619+
PARSER.parse_tree.create_package_item(stack_expr($2)); }
600620
| attribute_instance_brace bind_directive
601621
| config_declaration
602622
;
@@ -769,9 +789,12 @@ ansi_port_declaration_brace:
769789
;
770790

771791
port_declaration:
772-
attribute_instance_brace inout_declaration { $$=$2; }
773-
| attribute_instance_brace input_declaration { $$=$2; }
774-
| attribute_instance_brace output_declaration { $$=$2; }
792+
attribute_instance_brace inout_declaration
793+
{ add_attributes($2, $1); $$=$2; }
794+
| attribute_instance_brace input_declaration
795+
{ add_attributes($2, $1); $$=$2; }
796+
| attribute_instance_brace output_declaration
797+
{ add_attributes($2, $1); $$=$2; }
775798
;
776799

777800
ansi_port_initializer_opt:
@@ -858,13 +881,20 @@ module_item_brace:
858881
;
859882

860883
module_or_generate_item:
861-
attribute_instance_brace parameter_override { $$=$2; }
862-
| attribute_instance_brace gate_instantiation { $$=$2; }
863-
// | attribute_instance_brace udp_instantiation { $$=$2; }
864-
| attribute_instance_brace module_instantiation { $$=$2; }
865-
| attribute_instance_brace smv_using { $$ = $2; }
866-
| attribute_instance_brace smv_assume { $$ = $2; }
867-
| attribute_instance_brace module_common_item { $$=$2; }
884+
attribute_instance_brace parameter_override
885+
{ add_attributes($2, $1); $$=$2; }
886+
| attribute_instance_brace gate_instantiation
887+
{ add_attributes($2, $1); $$=$2; }
888+
// | attribute_instance_brace udp_instantiation
889+
// { add_attributes($2, $1); $$=$2; }
890+
| attribute_instance_brace module_instantiation
891+
{ add_attributes($2, $1); $$=$2; }
892+
| attribute_instance_brace smv_using
893+
{ add_attributes($2, $1); $$=$2; }
894+
| attribute_instance_brace smv_assume
895+
{ add_attributes($2, $1); $$=$2; }
896+
| attribute_instance_brace module_common_item
897+
{ add_attributes($2, $1); $$=$2; }
868898
;
869899

870900
module_or_generate_item_declaration:
@@ -873,16 +903,21 @@ module_or_generate_item_declaration:
873903
;
874904

875905
non_port_module_item:
876-
attribute_instance_brace generate_region { $$=$2; }
906+
attribute_instance_brace generate_region
907+
{ add_attributes($2, $1); $$=$2; }
877908
| module_or_generate_item
878-
| attribute_instance_brace specparam_declaration {$$=$2; }
879-
| attribute_instance_brace specify_block { $$=$2;}
909+
| attribute_instance_brace specparam_declaration
910+
{ add_attributes($2, $1); $$=$2; }
911+
| attribute_instance_brace specify_block
912+
{ add_attributes($2, $1); $$=$2; }
880913
;
881914

882915
/*
883916
module_or_generate_item
884-
| attribute_instance_brace parameter_declaration { $$=$2; }
885-
// | attribute_instance_brace local_parameter_declaration { $$=$2; }
917+
| attribute_instance_brace parameter_declaration
918+
// { add_attributes($2, $1); $$=$2; }
919+
// | attribute_instance_brace local_parameter_declaration
920+
// { add_attributes($2, $1); $$=$2; }
886921
;
887922
*/
888923

@@ -907,10 +942,15 @@ class_item_brace:
907942

908943
class_item:
909944
// attribute_instance_brace class_property
945+
// { add_attributes($2, $1); $$=$2; }
910946
// | attribute_instance_brace class_method
947+
// { add_attributes($2, $1); $$=$2; }
911948
// | attribute_instance_brace class_constraint
949+
// { add_attributes($2, $1); $$=$2; }
912950
attribute_instance_brace class_declaration
951+
{ add_attributes($2, $1); $$=$2; }
913952
| attribute_instance_brace covergroup_declaration
953+
{ add_attributes($2, $1); $$=$2; }
914954
| local_parameter_declaration ';'
915955
| parameter_declaration ';'
916956
| ';'
@@ -1351,7 +1391,10 @@ struct_union_member:
13511391
random_qualifier_opt
13521392
data_type_or_void
13531393
list_of_variable_decl_assignments ';'
1354-
{ $$=$4; stack_expr($$).id(ID_decl); addswap($$, ID_type, $3); }
1394+
{ $$=$4;
1395+
stack_expr($$).id(ID_decl);
1396+
addswap($$, ID_type, $3);
1397+
add_attributes($$, $1); }
13551398
;
13561399

13571400
enum_base_type_opt:
@@ -1867,9 +1910,12 @@ tf_item_declaration_brace:
18671910

18681911
tf_item_declaration:
18691912
block_item_declaration
1870-
| attribute_instance_brace input_declaration ';' { $$ = $2; }
1871-
| attribute_instance_brace output_declaration ';' { $$ = $2; }
1872-
| attribute_instance_brace inout_declaration ';' { $$ = $2; }
1913+
| attribute_instance_brace input_declaration ';'
1914+
{ add_attributes($2, $1); $$ = $2; }
1915+
| attribute_instance_brace output_declaration ';'
1916+
{ add_attributes($2, $1); $$ = $2; }
1917+
| attribute_instance_brace inout_declaration ';'
1918+
{ add_attributes($2, $1); $$ = $2; }
18731919
;
18741920

18751921
function_prototype: TOK_FUNCTION data_type_or_void function_identifier
@@ -1936,6 +1982,7 @@ tf_port_item:
19361982
port_identifier
19371983
variable_dimension_brace
19381984
{ init($$, ID_decl);
1985+
add_attributes($$, $1);
19391986
addswap($$, ID_class, $2);
19401987
addswap($$, ID_type, $3);
19411988
stack_expr($4).id(ID_declarator);
@@ -1953,10 +2000,14 @@ tf_port_direction_opt:
19532000
// A.2.8 Block item declarations
19542001

19552002
block_item_declaration:
1956-
attribute_instance_brace data_declaration { $$=$2; }
1957-
| attribute_instance_brace local_parameter_declaration ';' { $$=$2; }
1958-
| attribute_instance_brace parameter_declaration ';' { $$=$2; }
1959-
| attribute_instance_brace let_declaration { $$=$2; }
2003+
attribute_instance_brace data_declaration
2004+
{ add_attributes($2, $1); $$=$2; }
2005+
| attribute_instance_brace local_parameter_declaration ';'
2006+
{ add_attributes($2, $1); $$=$2; }
2007+
| attribute_instance_brace parameter_declaration ';'
2008+
{ add_attributes($2, $1); $$=$2; }
2009+
| attribute_instance_brace let_declaration
2010+
{ add_attributes($2, $1); $$=$2; }
19602011
;
19612012

19622013
// System Verilog standard 1800-2017
@@ -2933,7 +2984,9 @@ block_item_declaration_or_statement_or_null:
29332984

29342985
statement_or_null:
29352986
statement
2936-
| attribute_instance_brace ';' { init($$, ID_skip); }
2987+
| attribute_instance_brace ';'
2988+
{ init($$, ID_skip);
2989+
add_attributes($$, $1); }
29372990
;
29382991

29392992
statement_or_null_brace:
@@ -3431,13 +3484,13 @@ event_trigger: TOK_MINUSGREATER hierarchical_event_identifier ';'
34313484

34323485
inc_or_dec_expression:
34333486
TOK_PLUSPLUS attribute_instance_brace variable_lvalue
3434-
{ init($$, ID_preincrement); mto($$, $3); }
3487+
{ init($$, ID_preincrement); mto($$, $3); add_attributes($$, $2); }
34353488
| TOK_MINUSMINUS attribute_instance_brace variable_lvalue
3436-
{ init($$, ID_predecrement); mto($$, $3); }
3489+
{ init($$, ID_predecrement); mto($$, $3); add_attributes($$, $2); }
34373490
| variable_lvalue attribute_instance_brace TOK_PLUSPLUS
3438-
{ init($$, ID_postincrement); mto($$, $1); }
3491+
{ init($$, ID_postincrement); mto($$, $1); add_attributes($$, $2); }
34393492
| variable_lvalue attribute_instance_brace TOK_MINUSMINUS
3440-
{ init($$, ID_postdecrement); mto($$, $1); }
3493+
{ init($$, ID_postdecrement); mto($$, $1); add_attributes($$, $2); }
34413494
;
34423495

34433496
constant_param_expression:
@@ -3475,7 +3528,7 @@ expression_brace:
34753528
expression:
34763529
primary
34773530
| unary_operator attribute_instance_brace primary
3478-
{ $$=$1; mto($$, $3); }
3531+
{ $$=$1; mto($$, $3); add_attributes($$, $2); }
34793532
| inc_or_dec_expression
34803533
| expression "->" expression
34813534
{ init($$, ID_implies); mto($$, $1); mto($$, $3); }
@@ -3670,7 +3723,7 @@ number: unsigned_number
36703723
36713724
attribute_instance_brace:
36723725
/* Optional */
3673-
{ init($$, ID_verilog_attribute); }
3726+
{ init($$, ID_verilog_attributes); }
36743727
| attribute_instance_brace attribute_instance
36753728
{ $$=$1;
36763729
for(auto &attr : stack_expr($2).get_sub())
@@ -3690,12 +3743,12 @@ attr_spec_list:
36903743
;
36913744
36923745
attr_spec: attr_name '=' constant_expression
3693-
{ init($$, "attribute");
3746+
{ init($$, ID_verilog_attribute);
36943747
stack_expr($$).add(ID_name).swap(stack_expr($1));
36953748
stack_expr($$).add(ID_value).swap(stack_expr($3));
36963749
}
36973750
| attr_name
3698-
{ init($$, "attribute"); stack_expr($$).add(ID_name).swap(stack_expr($1)); }
3751+
{ init($$, ID_verilog_attribute); stack_expr($$).add(ID_name).swap(stack_expr($1)); }
36993752
;
37003753
37013754
attr_name: identifier

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