@@ -801,9 +801,7 @@ int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,
801
801
queue_input .mqd_addr = amdgpu_bo_gpu_offset (ring -> mqd_obj );
802
802
queue_input .wptr_addr = ring -> wptr_gpu_addr ;
803
803
804
- amdgpu_mes_lock (& adev -> mes );
805
804
r = adev -> mes .funcs -> map_legacy_queue (& adev -> mes , & queue_input );
806
- amdgpu_mes_unlock (& adev -> mes );
807
805
if (r )
808
806
DRM_ERROR ("failed to map legacy queue\n" );
809
807
@@ -826,9 +824,7 @@ int amdgpu_mes_unmap_legacy_queue(struct amdgpu_device *adev,
826
824
queue_input .trail_fence_addr = gpu_addr ;
827
825
queue_input .trail_fence_data = seq ;
828
826
829
- amdgpu_mes_lock (& adev -> mes );
830
827
r = adev -> mes .funcs -> unmap_legacy_queue (& adev -> mes , & queue_input );
831
- amdgpu_mes_unlock (& adev -> mes );
832
828
if (r )
833
829
DRM_ERROR ("failed to unmap legacy queue\n" );
834
830
@@ -849,13 +845,11 @@ uint32_t amdgpu_mes_rreg(struct amdgpu_device *adev, uint32_t reg)
849
845
goto error ;
850
846
}
851
847
852
- amdgpu_mes_lock (& adev -> mes );
853
848
r = adev -> mes .funcs -> misc_op (& adev -> mes , & op_input );
854
849
if (r )
855
850
DRM_ERROR ("failed to read reg (0x%x)\n" , reg );
856
851
else
857
852
val = * (adev -> mes .read_val_ptr );
858
- amdgpu_mes_unlock (& adev -> mes );
859
853
860
854
error :
861
855
return val ;
@@ -877,9 +871,7 @@ int amdgpu_mes_wreg(struct amdgpu_device *adev,
877
871
goto error ;
878
872
}
879
873
880
- amdgpu_mes_lock (& adev -> mes );
881
874
r = adev -> mes .funcs -> misc_op (& adev -> mes , & op_input );
882
- amdgpu_mes_unlock (& adev -> mes );
883
875
if (r )
884
876
DRM_ERROR ("failed to write reg (0x%x)\n" , reg );
885
877
@@ -906,9 +898,7 @@ int amdgpu_mes_reg_write_reg_wait(struct amdgpu_device *adev,
906
898
goto error ;
907
899
}
908
900
909
- amdgpu_mes_lock (& adev -> mes );
910
901
r = adev -> mes .funcs -> misc_op (& adev -> mes , & op_input );
911
- amdgpu_mes_unlock (& adev -> mes );
912
902
if (r )
913
903
DRM_ERROR ("failed to reg_write_reg_wait\n" );
914
904
@@ -933,9 +923,7 @@ int amdgpu_mes_reg_wait(struct amdgpu_device *adev, uint32_t reg,
933
923
goto error ;
934
924
}
935
925
936
- amdgpu_mes_lock (& adev -> mes );
937
926
r = adev -> mes .funcs -> misc_op (& adev -> mes , & op_input );
938
- amdgpu_mes_unlock (& adev -> mes );
939
927
if (r )
940
928
DRM_ERROR ("failed to reg_write_reg_wait\n" );
941
929
0 commit comments