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Jay-Jiewu-Lusys_zuul
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minor refactor
Change-Id: I0e15cae06331280e99622d95d10210e1e21c0b88
1 parent c3042bb commit d5cc742

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6 files changed

+20
-9
lines changed

6 files changed

+20
-9
lines changed

IGC/Compiler/CISACodeGen/PatternMatchPass.cpp

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3792,7 +3792,14 @@ namespace IGC
37923792

37933793
bool CodeGenPatternMatch::MatchWaveShuffleIndex(llvm::GenIntrinsicInst& I)
37943794
{
3795-
HandleSubspanUse(I.getArgOperand(0));
3795+
llvm::Value* helperLaneMode = I.getOperand(2);
3796+
assert(helperLaneMode);
3797+
if (int_cast<int>(cast<ConstantInt>(helperLaneMode)->getSExtValue()) == 1)
3798+
{
3799+
//only if helperLaneMode==1, we enable helper lane under some shuffleindex cases (not for all cases).
3800+
HandleSubspanUse(I.getArgOperand(0));
3801+
HandleSubspanUse(&I);
3802+
}
37963803
return MatchSingleInstruction(I);
37973804
}
37983805

IGC/Compiler/Optimizer/CodeAssumption.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -116,11 +116,12 @@ void CodeAssumption::uniformHelper(Module* M)
116116
// The value must be uniform. Using shuffle with index=0 to
117117
// enforce it. (This is entry BB, thus lane 0 must be active.)
118118
Type* int32Ty = Type::getInt32Ty(M->getContext());
119-
Value* args[2];
119+
Value* args[3];
120120
args[0] = CallI;
121121
args[1] = ConstantInt::getNullValue(int32Ty);
122+
args[2] = ConstantInt::get(int32Ty, 0);
122123

123-
Type* ITys[2] = { args[0]->getType(), int32Ty };
124+
Type* ITys[3] = { args[0]->getType(), int32Ty, int32Ty};
124125
Function* shuffleIntrin = GenISAIntrinsic::getDeclaration(
125126
M,
126127
GenISAIntrinsic::GenISA_WaveShuffleIndex,

IGC/Compiler/Optimizer/OpenCLPasses/SubGroupFuncs/SubGroupFuncsResolution.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -562,9 +562,11 @@ void SubGroupFuncsResolution::visitCallInst(CallInst& CI)
562562
CheckSIMDSize(CI, "Shuffle not supported in SIMD32");
563563

564564
// Creates intrinsics that will be lowered in the CodeGen and will handle the sub_group_shuffle function
565-
Value* args[2];
565+
IRBuilder<> IRB(&CI);
566+
Value* args[3];
566567
args[0] = CI.getArgOperand(0);
567568
args[1] = CI.getArgOperand(1);
569+
args[2] = IRB.getInt32(0);
568570

569571
Function* simdShuffleFunc = GenISAIntrinsic::getDeclaration(CI.getCalledFunction()->getParent(),
570572
GenISAIntrinsic::GenISA_WaveShuffleIndex, args[0]->getType());

IGC/GenISAIntrinsics/Intrinsic_definitions.py

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -283,8 +283,9 @@
283283
"GenISA_WaveBallot": ["int",["bool"],"Convergent,InaccessibleMemOnly"],
284284
# For each active lane n, return value of n-th bit from the input bitfield. Signature: (bitfield)->bool
285285
"GenISA_WaveInverseBallot": ["bool",["int"],"Convergent,InaccessibleMemOnly"],
286-
# Read from a specific lane. Signature: (value, lane)->value
287-
"GenISA_WaveShuffleIndex": ["anyint",[0,"int"],"Convergent,NoMem"],
286+
# Read from a specific lane. Signature: (value, lane, helperLaneMode)->value
287+
# helperLaneMode is to tell if helper lane could be used under some situations. 0: not used; 1: used.
288+
"GenISA_WaveShuffleIndex": ["anyint",[0,"int", "int"],"Convergent,NoMem"],
288289
# Accumulate all the active lanes. Signature: (value, op)->result; where op is one of IGC::WaveOps
289290
"GenISA_WaveAll": ["anyint",[0,"char"],"Convergent,InaccessibleMemOnly"],
290291
# Accumulate all active lanes within consecutive input clusters and broadcast the result to associated output clusters.

IGC/LLVM3DBuilder/BuiltinsFrontend.hpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -762,7 +762,7 @@ class LLVM3DBuilder : public llvm::IGCIRBuilder<T, Inserter>
762762
llvm::CallInst* create_countbits(llvm::Value* src);
763763
llvm::Value* create_waveBallot(llvm::Value* src);
764764
llvm::Value* create_waveInverseBallot(llvm::Value* src);
765-
llvm::Value* create_waveshuffleIndex(llvm::Value* src, llvm::Value* index);
765+
llvm::Value* create_waveshuffleIndex(llvm::Value* src, llvm::Value* index, llvm::Value* helperLaneMode = nullptr);
766766
llvm::Value* create_waveAll(llvm::Value* src, llvm::Value* type);
767767
llvm::Value* create_wavePrefix(
768768
llvm::Value* src, llvm::Value* type, bool inclusive,

IGC/LLVM3DBuilder/BuiltinsFrontendDefinitions.hpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4373,14 +4373,14 @@ inline llvm::Value* LLVM3DBuilder<preserveNames, T, Inserter>::create_waveBallot
43734373
}
43744374

43754375
template<bool preserveNames, typename T, typename Inserter>
4376-
inline llvm::Value* LLVM3DBuilder<preserveNames, T, Inserter>::create_waveshuffleIndex(llvm::Value* src, llvm::Value* index)
4376+
inline llvm::Value* LLVM3DBuilder<preserveNames, T, Inserter>::create_waveshuffleIndex(llvm::Value* src, llvm::Value* index, llvm::Value* helperLaneMode)
43774377
{
43784378
llvm::Module* module = this->GetInsertBlock()->getParent()->getParent();
43794379
llvm::Function* pFunc = llvm::GenISAIntrinsic::getDeclaration(
43804380
module,
43814381
llvm::GenISAIntrinsic::GenISA_WaveShuffleIndex,
43824382
src->getType());
4383-
return this->CreateCall2(pFunc, src, index);
4383+
return this->CreateCall3(pFunc, src, index, (helperLaneMode ? helperLaneMode : this->getInt32(0)));
43844384
}
43854385

43864386
template<bool preserveNames, typename T, typename Inserter>

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