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| 1 | +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o %t.cir |
| 2 | +// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR |
| 3 | +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-llvm %s -o %t-cir.ll |
| 4 | +// RUN: FileCheck --input-file=%t-cir.ll %s -check-prefix=LLVM |
| 5 | +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -Wno-unused-value -emit-llvm %s -o %t.ll |
| 6 | +// RUN: FileCheck --input-file=%t.ll %s -check-prefix=OGCG |
| 7 | + |
| 8 | +int foo() { |
| 9 | + int e = (int){1}; |
| 10 | + return e; |
| 11 | +} |
| 12 | + |
| 13 | +// CIR: %[[RET:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["__retval"] |
| 14 | +// CIR: %[[INIT:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["e", init] |
| 15 | +// CIR: %[[COMPOUND:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, [".compoundliteral", init] |
| 16 | +// CIR: %[[VALUE:.*]] = cir.const #cir.int<1> : !s32i |
| 17 | +// CIR: cir.store{{.*}} %[[VALUE]], %[[COMPOUND]] : !s32i, !cir.ptr<!s32i> |
| 18 | +// CIR: %[[TMP:.*]] = cir.load{{.*}} %[[COMPOUND]] : !cir.ptr<!s32i>, !s32i |
| 19 | +// CIR: cir.store{{.*}} %[[TMP]], %[[INIT]] : !s32i, !cir.ptr<!s32i> |
| 20 | +// CIR: %[[TMP_2:.*]] = cir.load{{.*}} %[[INIT]] : !cir.ptr<!s32i>, !s32i |
| 21 | +// CIR: cir.store %[[TMP_2]], %[[RET]] : !s32i, !cir.ptr<!s32i> |
| 22 | +// CIR: %[[TMP_3:.*]] = cir.load %[[RET]] : !cir.ptr<!s32i>, !s32i |
| 23 | +// CIR: cir.return %[[TMP_3]] : !s32i |
| 24 | + |
| 25 | +// LLVM: %[[RET:.*]] = alloca i32, i64 1, align 4 |
| 26 | +// LLVM: %[[INIT:.*]] = alloca i32, i64 1, align 4 |
| 27 | +// LLVM: %[[COMPOUND:.*]] = alloca i32, i64 1, align 4 |
| 28 | +// LLVM: store i32 1, ptr %[[COMPOUND]], align 4 |
| 29 | +// LLVM: %[[TMP:.*]] = load i32, ptr %[[COMPOUND]], align 4 |
| 30 | +// LLVM: store i32 %[[TMP]], ptr %[[INIT]], align 4 |
| 31 | +// LLVM: %[[TMP_2:.*]] = load i32, ptr %[[INIT]], align 4 |
| 32 | +// LLVM: store i32 %[[TMP_2]], ptr %[[RET]], align 4 |
| 33 | +// LLVM: %[[TMP_3:.*]] = load i32, ptr %[[RET]], align 4 |
| 34 | +// LLVM: ret i32 %[[TMP_3]] |
| 35 | + |
| 36 | +// OGCG: %[[INIT:.*]] = alloca i32, align 4 |
| 37 | +// OGCG: %[[COMPOUND:.*]] = alloca i32, align 4 |
| 38 | +// OGCG: store i32 1, ptr %[[COMPOUND]], align 4 |
| 39 | +// OGCG: %[[TMP:.*]] = load i32, ptr %[[COMPOUND]], align 4 |
| 40 | +// OGCG: store i32 %[[TMP]], ptr %[[INIT]], align 4 |
| 41 | +// OGCG: %[[TMP_2:.*]] = load i32, ptr %[[INIT]], align 4 |
| 42 | +// OGCG: ret i32 %[[TMP_2]] |
| 43 | + |
| 44 | +void foo2() { |
| 45 | + int _Complex a = (int _Complex) { 1, 2}; |
| 46 | +} |
| 47 | + |
| 48 | +// CIR: %[[A_ADDR:.*]] = cir.alloca !cir.complex<!s32i>, !cir.ptr<!cir.complex<!s32i>>, ["a", init] |
| 49 | +// CIR: %[[CL_ADDR:.*]] = cir.alloca !cir.complex<!s32i>, !cir.ptr<!cir.complex<!s32i>>, [".compoundliteral"] |
| 50 | +// CIR: %[[COMPLEX:.*]] = cir.const #cir.const_complex<#cir.int<1> : !s32i, #cir.int<2> : !s32i> : !cir.complex<!s32i> |
| 51 | +// CIR: cir.store{{.*}} %[[COMPLEX]], %[[CL_ADDR]] : !cir.complex<!s32i>, !cir.ptr<!cir.complex<!s32i>> |
| 52 | +// CIR: %[[TMP:.*]] = cir.load{{.*}} %[[CL_ADDR]] : !cir.ptr<!cir.complex<!s32i>>, !cir.complex<!s32i> |
| 53 | +// CIR: cir.store{{.*}} %[[TMP]], %[[A_ADDR]] : !cir.complex<!s32i>, !cir.ptr<!cir.complex<!s32i>> |
| 54 | + |
| 55 | +// LLVM: %[[A_ADDR:.*]] = alloca { i32, i32 }, i64 1, align 4 |
| 56 | +// LLVM: %[[CL_ADDR:.*]] = alloca { i32, i32 }, i64 1, align 4 |
| 57 | +// LLVM: store { i32, i32 } { i32 1, i32 2 }, ptr %[[CL_ADDR]], align 4 |
| 58 | +// LLVM: %[[TMP:.*]] = load { i32, i32 }, ptr %[[CL_ADDR]], align 4 |
| 59 | +// LLVM: store { i32, i32 } %[[TMP]], ptr %[[A_ADDR]], align 4 |
| 60 | + |
| 61 | +// OGCG: %[[A_ADDR:.*]] = alloca { i32, i32 }, align 4 |
| 62 | +// OGCG: %[[CL_ADDR:.*]] = alloca { i32, i32 }, align 4 |
| 63 | +// OGCG: %[[CL_REAL_PTR:.*]] = getelementptr inbounds nuw { i32, i32 }, ptr %[[CL_ADDR]], i32 0, i32 0 |
| 64 | +// OGCG: %[[CL_IMAG_PTR:.*]] = getelementptr inbounds nuw { i32, i32 }, ptr %[[CL_ADDR]], i32 0, i32 1 |
| 65 | +// OGCG: store i32 1, ptr %[[CL_REAL_PTR]], align 4 |
| 66 | +// OGCG: store i32 2, ptr %[[CL_IMAG_PTR]], align 4 |
| 67 | +// OGCG: %[[CL_REAL_PTR:.*]] = getelementptr inbounds nuw { i32, i32 }, ptr %[[CL_ADDR]], i32 0, i32 0 |
| 68 | +// OGCG: %[[CL_REAL:.*]] = load i32, ptr %[[CL_REAL_PTR]], align 4 |
| 69 | +// OGCG: %[[CL_IMAG_PTR:.*]] = getelementptr inbounds nuw { i32, i32 }, ptr %[[CL_ADDR]], i32 0, i32 1 |
| 70 | +// OGCG: %[[CL_IMAG:.*]] = load i32, ptr %[[CL_IMAG_PTR]], align 4 |
| 71 | +// OGCG: %[[A_REAL_PTR:.*]] = getelementptr inbounds nuw { i32, i32 }, ptr %[[A_ADDR]], i32 0, i32 0 |
| 72 | +// OGCG: %[[A_IMAG_PTR:.*]] = getelementptr inbounds nuw { i32, i32 }, ptr %[[A_ADDR]], i32 0, i32 1 |
| 73 | +// OGCG: store i32 %[[CL_REAL]], ptr %[[A_REAL_PTR]], align 4 |
| 74 | +// OGCG: store i32 %[[CL_IMAG]], ptr %[[A_IMAG_PTR]], align 4 |
| 75 | + |
| 76 | +void foo3() { |
| 77 | + typedef int vi4 __attribute__((vector_size(16))); |
| 78 | + auto a = (vi4){10, 20, 30, 40}; |
| 79 | +} |
| 80 | + |
| 81 | +// CIR: %[[A_ADDR:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["a", init] |
| 82 | +// CIR: %[[CL_ADDR:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, [".compoundliteral", init] |
| 83 | +// CIR: %[[VEC:.*]] = cir.const #cir.const_vector<[#cir.int<10> : !s32i, #cir.int<20> : !s32i, #cir.int<30> : !s32i, #cir.int<40> : !s32i]> : !cir.vector<4 x !s32i> |
| 84 | +// CIR: cir.store{{.*}} %[[VEC]], %[[CL_ADDR]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>> |
| 85 | +// CIR: %[[TMP:.*]] = cir.load{{.*}} %[[CL_ADDR]] : !cir.ptr<!cir.vector<4 x !s32i>>, !cir.vector<4 x !s32i> |
| 86 | +// CIR: cir.store{{.*}} %[[TMP]], %[[A_ADDR]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>> |
| 87 | + |
| 88 | +// LLVM: %[[A_ADDR:.*]] = alloca <4 x i32>, i64 1, align 16 |
| 89 | +// LLVM: %[[CL_ADDR:.*]] = alloca <4 x i32>, i64 1, align 16 |
| 90 | +// LLVM: store <4 x i32> <i32 10, i32 20, i32 30, i32 40>, ptr %[[CL_ADDR]], align 16 |
| 91 | +// LLVM: %[[TMP:.*]] = load <4 x i32>, ptr %[[CL_ADDR]], align 16 |
| 92 | +// LLVM: store <4 x i32> %[[TMP]], ptr %[[A_ADDR]], align 16 |
| 93 | + |
| 94 | +// OGCG: %[[A_ADDR:.*]] = alloca <4 x i32>, align 16 |
| 95 | +// OGCG: %[[CL_ADDR:.*]] = alloca <4 x i32>, align 16 |
| 96 | +// OGCG: store <4 x i32> <i32 10, i32 20, i32 30, i32 40>, ptr %[[CL_ADDR]], align 16 |
| 97 | +// OGCG: %[[TMP:.*]] = load <4 x i32>, ptr %[[CL_ADDR]], align 16 |
| 98 | +// OGCG: store <4 x i32> %[[TMP]], ptr %[[A_ADDR]], align 16 |
| 99 | + |
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