Skip to content

Commit e8d6879

Browse files
committed
Address code review comments
1 parent a83dcd3 commit e8d6879

File tree

4 files changed

+74
-2
lines changed

4 files changed

+74
-2
lines changed

clang/lib/CIR/CodeGen/CIRGenExpr.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1059,9 +1059,8 @@ void CIRGenFunction::emitAnyExprToMem(const Expr *e, Address location,
10591059
// FIXME: This function should take an LValue as an argument.
10601060
switch (getEvaluationKind(e->getType())) {
10611061
case cir::TEK_Complex: {
1062-
RValue rv = RValue::get(emitComplexExpr(e));
10631062
LValue lv = makeAddrLValue(location, e->getType());
1064-
emitStoreThroughLValue(rv, lv);
1063+
emitComplexExprIntoLValue(e, lv, isInit);
10651064
return;
10661065
}
10671066

clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,11 @@ class ComplexExprEmitter : public StmtVisitor<ComplexExprEmitter, mlir::Value> {
5252
mlir::Value VisitGenericSelectionExpr(GenericSelectionExpr *e);
5353
mlir::Value VisitImplicitCastExpr(ImplicitCastExpr *e);
5454
mlir::Value VisitInitListExpr(const InitListExpr *e);
55+
56+
mlir::Value VisitCompoundLiteralExpr(CompoundLiteralExpr *e) {
57+
return emitLoadOfLValue(e);
58+
}
59+
5560
mlir::Value VisitImaginaryLiteral(const ImaginaryLiteral *il);
5661
mlir::Value VisitParenExpr(ParenExpr *e);
5762
mlir::Value
@@ -467,6 +472,15 @@ mlir::Value CIRGenFunction::emitComplexPrePostIncDec(const UnaryOperator *e,
467472
return isPre ? incVal : inVal;
468473
}
469474

475+
void CIRGenFunction::emitComplexExprIntoLValue(const Expr *e, LValue dest,
476+
bool isInit) {
477+
assert(e && getComplexType(e->getType()) &&
478+
"Invalid complex expression to emit");
479+
ComplexExprEmitter emitter(*this);
480+
mlir::Value value = emitter.Visit(const_cast<Expr *>(e));
481+
emitter.emitStoreOfComplex(getLoc(e->getExprLoc()), value, dest, isInit);
482+
}
483+
470484
mlir::Value CIRGenFunction::emitLoadOfComplex(LValue src, SourceLocation loc) {
471485
return ComplexExprEmitter(*this).emitLoadOfLValue(src, loc);
472486
}

clang/lib/CIR/CodeGen/CIRGenFunction.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -936,6 +936,8 @@ class CIRGenFunction : public CIRGenTypeCache {
936936
/// returning the result.
937937
mlir::Value emitComplexExpr(const Expr *e);
938938

939+
void emitComplexExprIntoLValue(const Expr *e, LValue dest, bool isInit);
940+
939941
mlir::Value emitComplexPrePostIncDec(const UnaryOperator *e, LValue lv,
940942
bool isInc, bool isPre);
941943

clang/test/CIR/CodeGen/compound_literal.cpp

Lines changed: 57 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,3 +40,60 @@ int foo() {
4040
// OGCG: store i32 %[[TMP]], ptr %[[INIT]], align 4
4141
// OGCG: %[[TMP_2:.*]] = load i32, ptr %[[INIT]], align 4
4242
// OGCG: ret i32 %[[TMP_2]]
43+
44+
void foo2() {
45+
int _Complex a = (int _Complex) { 1, 2};
46+
}
47+
48+
// CIR: %[[A_ADDR:.*]] = cir.alloca !cir.complex<!s32i>, !cir.ptr<!cir.complex<!s32i>>, ["a", init]
49+
// CIR: %[[CL_ADDR:.*]] = cir.alloca !cir.complex<!s32i>, !cir.ptr<!cir.complex<!s32i>>, [".compoundliteral"]
50+
// CIR: %[[COMPLEX:.*]] = cir.const #cir.const_complex<#cir.int<1> : !s32i, #cir.int<2> : !s32i> : !cir.complex<!s32i>
51+
// CIR: cir.store{{.*}} %[[COMPLEX]], %[[CL_ADDR]] : !cir.complex<!s32i>, !cir.ptr<!cir.complex<!s32i>>
52+
// CIR: %[[TMP:.*]] = cir.load{{.*}} %[[CL_ADDR]] : !cir.ptr<!cir.complex<!s32i>>, !cir.complex<!s32i>
53+
// CIR: cir.store{{.*}} %[[TMP]], %[[A_ADDR]] : !cir.complex<!s32i>, !cir.ptr<!cir.complex<!s32i>>
54+
55+
// LLVM: %[[A_ADDR:.*]] = alloca { i32, i32 }, i64 1, align 4
56+
// LLVM: %[[CL_ADDR:.*]] = alloca { i32, i32 }, i64 1, align 4
57+
// LLVM: store { i32, i32 } { i32 1, i32 2 }, ptr %[[CL_ADDR]], align 4
58+
// LLVM: %[[TMP:.*]] = load { i32, i32 }, ptr %[[CL_ADDR]], align 4
59+
// LLVM: store { i32, i32 } %[[TMP]], ptr %[[A_ADDR]], align 4
60+
61+
// OGCG: %[[A_ADDR:.*]] = alloca { i32, i32 }, align 4
62+
// OGCG: %[[CL_ADDR:.*]] = alloca { i32, i32 }, align 4
63+
// OGCG: %[[CL_REAL_PTR:.*]] = getelementptr inbounds nuw { i32, i32 }, ptr %[[CL_ADDR]], i32 0, i32 0
64+
// OGCG: %[[CL_IMAG_PTR:.*]] = getelementptr inbounds nuw { i32, i32 }, ptr %[[CL_ADDR]], i32 0, i32 1
65+
// OGCG: store i32 1, ptr %[[CL_REAL_PTR]], align 4
66+
// OGCG: store i32 2, ptr %[[CL_IMAG_PTR]], align 4
67+
// OGCG: %[[CL_REAL_PTR:.*]] = getelementptr inbounds nuw { i32, i32 }, ptr %[[CL_ADDR]], i32 0, i32 0
68+
// OGCG: %[[CL_REAL:.*]] = load i32, ptr %[[CL_REAL_PTR]], align 4
69+
// OGCG: %[[CL_IMAG_PTR:.*]] = getelementptr inbounds nuw { i32, i32 }, ptr %[[CL_ADDR]], i32 0, i32 1
70+
// OGCG: %[[CL_IMAG:.*]] = load i32, ptr %[[CL_IMAG_PTR]], align 4
71+
// OGCG: %[[A_REAL_PTR:.*]] = getelementptr inbounds nuw { i32, i32 }, ptr %[[A_ADDR]], i32 0, i32 0
72+
// OGCG: %[[A_IMAG_PTR:.*]] = getelementptr inbounds nuw { i32, i32 }, ptr %[[A_ADDR]], i32 0, i32 1
73+
// OGCG: store i32 %[[CL_REAL]], ptr %[[A_REAL_PTR]], align 4
74+
// OGCG: store i32 %[[CL_IMAG]], ptr %[[A_IMAG_PTR]], align 4
75+
76+
void foo3() {
77+
typedef int vi4 __attribute__((vector_size(16)));
78+
auto a = (vi4){10, 20, 30, 40};
79+
}
80+
81+
// CIR: %[[A_ADDR:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, ["a", init]
82+
// CIR: %[[CL_ADDR:.*]] = cir.alloca !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>, [".compoundliteral", init]
83+
// CIR: %[[VEC:.*]] = cir.const #cir.const_vector<[#cir.int<10> : !s32i, #cir.int<20> : !s32i, #cir.int<30> : !s32i, #cir.int<40> : !s32i]> : !cir.vector<4 x !s32i>
84+
// CIR: cir.store{{.*}} %[[VEC]], %[[CL_ADDR]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
85+
// CIR: %[[TMP:.*]] = cir.load{{.*}} %[[CL_ADDR]] : !cir.ptr<!cir.vector<4 x !s32i>>, !cir.vector<4 x !s32i>
86+
// CIR: cir.store{{.*}} %[[TMP]], %[[A_ADDR]] : !cir.vector<4 x !s32i>, !cir.ptr<!cir.vector<4 x !s32i>>
87+
88+
// LLVM: %[[A_ADDR:.*]] = alloca <4 x i32>, i64 1, align 16
89+
// LLVM: %[[CL_ADDR:.*]] = alloca <4 x i32>, i64 1, align 16
90+
// LLVM: store <4 x i32> <i32 10, i32 20, i32 30, i32 40>, ptr %[[CL_ADDR]], align 16
91+
// LLVM: %[[TMP:.*]] = load <4 x i32>, ptr %[[CL_ADDR]], align 16
92+
// LLVM: store <4 x i32> %[[TMP]], ptr %[[A_ADDR]], align 16
93+
94+
// OGCG: %[[A_ADDR:.*]] = alloca <4 x i32>, align 16
95+
// OGCG: %[[CL_ADDR:.*]] = alloca <4 x i32>, align 16
96+
// OGCG: store <4 x i32> <i32 10, i32 20, i32 30, i32 40>, ptr %[[CL_ADDR]], align 16
97+
// OGCG: %[[TMP:.*]] = load <4 x i32>, ptr %[[CL_ADDR]], align 16
98+
// OGCG: store <4 x i32> %[[TMP]], ptr %[[A_ADDR]], align 16
99+

0 commit comments

Comments
 (0)