tests: Align ref_smp_svr

Align the ref_smp_svr sample with the optimized merged slots.

Signed-off-by: Tomasz Chyrowicz <[email protected]>

Author: tomchy

tests/subsys/bootloader/upgrade/ref_smp_svr/Kconfig.sysbuild

@@ -18,4 +18,7 @@ config SECURE_BOOT_SIGNING_KEY_FILE
 	default "$ZEPHYR_BASE/../bootloader/mcuboot/root-ed25519.pem" if SECURE_BOOT_SIGNATURE_TYPE_ED25519
 	default "$ZEPHYR_BASE/../bootloader/mcuboot/root-ec-p256.pem" if SECURE_BOOT_SIGNATURE_TYPE_ECDSA
 
+config MCUBOOT_IMAGES_ROM_END_OFFSET_AUTO
+	default "ipc_radio;ipc_radio_secondary_app" if MCUBOOT_SIGN_MERGED_BINARY
+
 source "${ZEPHYR_BASE}/share/sysbuild/Kconfig"

tests/subsys/bootloader/upgrade/ref_smp_svr/boards/nrf54h20dk_nrf54h20_cpuapp_direct_xip.overlay

@@ -0,0 +1,9 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+#include "../sysbuild/nrf54h20dk_nrf54h20_memory_map_direct_xip.dtsi"
+
+secondary_app_partition: &cpuapp_slot1_partition {};

tests/subsys/bootloader/upgrade/ref_smp_svr/sysbuild/ipc_radio_direct_xip.overlay

@@ -0,0 +1,9 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+#include "nrf54h20dk_nrf54h20_memory_map_direct_xip.dtsi"
+
+secondary_app_partition: &cpurad_slot1_partition {};

tests/subsys/bootloader/upgrade/ref_smp_svr/sysbuild/mcuboot/boards/nrf54h20dk_nrf54h20_cpuapp_direct_xip.overlay

@@ -0,0 +1,68 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+#include "../../nrf54h20dk_nrf54h20_memory_map_direct_xip.dtsi"
+
+/ {
+	chosen {
+		zephyr,code-partition = &boot_partition;
+	};
+};
+
+/*
+ * Copy required overlay for mcuboot from bootloader/mcuboot.
+ *
+ * Required as the overlay in bootloader/mcuboot is ignored due to
+ * board overlay in this test.
+ */
+
+&gdpwr {
+	status = "disabled";
+};
+
+&gdpwr_fast_active_0 {
+	status = "disabled";
+};
+
+&gdpwr_fast_active_1 {
+	status = "disabled";
+};
+
+&gdpwr_fast_main {
+	status = "disabled";
+};
+
+&gdpwr_slow_active {
+	status = "disabled";
+};
+
+&gdpwr_slow_main {
+	status = "disabled";
+};
+
+&gpio_pad_group0 {
+	status = "disabled";
+};
+
+&gpio_pad_group1 {
+	status = "disabled";
+};
+
+&gpio_pad_group2 {
+	status = "disabled";
+};
+
+&gpio_pad_group6 {
+	status = "disabled";
+};
+
+&gpio_pad_group7 {
+	status = "disabled";
+};
+
+&gpio_pad_group9 {
+	status = "disabled";
+};

tests/subsys/bootloader/upgrade/ref_smp_svr/sysbuild/nrf54h20dk_nrf54h20_memory_map_direct_xip.dtsi

@@ -0,0 +1,57 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+/* On nRF54H20 the Direct XIP mode is supported in the merged slot configuration
+ * Extend slot0_partition and slot1_partition to cover both application and
+ * radio images, as well as MCUboot image metadata (header and trailer).
+ * Those partitions will be used by MCUboot to verify the merged image to boot.
+ * Apart from that, they will be used by the MCUmgr subsystem to correctly
+ * handle flags, stored inside the MCUboot image trailer.
+ * Use cpu<app|rad>_slot<0|1>_partition as zephyr,code-partition, so the
+ * application and radio sizes are correctly reported.
+ */
+/delete-node/&cpuapp_slot0_partition;
+/delete-node/&cpuapp_slot1_partition;
+/delete-node/&cpurad_slot0_partition;
+/delete-node/&cpurad_slot1_partition;
+
+&mram1x {
+	partitions {
+		/* Merged partition used by the MCUboot (variant 0). */
+		slot0_partition: partition@40000 {
+			reg = <0x40000 DT_SIZE_K(656)>;
+		};
+
+		/* Application code partition (variant 0).
+		 * Offset by the MCUboot header size (2048 bytes).
+		 */
+		cpuapp_slot0_partition: partition@40800 {
+			reg = <0x40800 DT_SIZE_K(326)>;
+		};
+
+		/* Radio code partition (variant 0). */
+		cpurad_slot0_partition: partition@92000 {
+			reg = <0x92000 DT_SIZE_K(328)>;
+		};
+
+		/* Merged partition used by the MCUboot (variant 1). */
+		slot1_partition: partition@100000 {
+			reg = <0x100000 DT_SIZE_K(656)>;
+		};
+
+		/* Application code partition (variant 1).
+		 * Offset by the MCUboot header size (2048 bytes).
+		 */
+		cpuapp_slot1_partition: partition@100800 {
+			reg = <0x100800 DT_SIZE_K(326)>;
+		};
+
+		/* Radio code partition (variant 1). */
+		cpurad_slot1_partition: partition@152000 {
+			reg = <0x152000 DT_SIZE_K(328)>;
+		};
+	};
+};