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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/mem_mgmt/mem_attr.h>
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#include <soc.h>
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+ #include <dmm.h>
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#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58
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#include <nrfx_ppi.h>
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#endif
@@ -133,9 +134,6 @@ struct spi_nrfx_config {
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#endif
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uint32_t wake_pin ;
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nrfx_gpiote_t wake_gpiote ;
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- #ifdef CONFIG_DCACHE
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- uint32_t mem_attr ;
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- #endif
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#ifdef SPIM_ANY_FAST
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const struct device * clk_dev ;
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struct nrf_clock_spec clk_spec ;
@@ -144,6 +142,7 @@ struct spi_nrfx_config {
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bool cross_domain ;
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int8_t default_port ;
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#endif
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+ void * mem_reg ;
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};
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static void event_handler (const nrfx_spim_evt_t * p_event , void * p_context );
@@ -514,11 +513,6 @@ static void transfer_next_chunk(const struct device *dev)
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}
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memcpy (dev_data -> tx_buffer , tx_buf , chunk_len );
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- #ifdef CONFIG_DCACHE
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- if (dev_config -> mem_attr & DT_MEM_CACHEABLE ) {
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- sys_cache_data_flush_range (dev_data -> tx_buffer , chunk_len );
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- }
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- #endif
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tx_buf = dev_data -> tx_buffer ;
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}
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@@ -535,10 +529,20 @@ static void transfer_next_chunk(const struct device *dev)
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dev_data -> chunk_len = chunk_len ;
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- xfer .p_tx_buffer = tx_buf ;
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- xfer .tx_length = spi_context_tx_buf_on (ctx ) ? chunk_len : 0 ;
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- xfer .p_rx_buffer = rx_buf ;
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- xfer .rx_length = spi_context_rx_buf_on (ctx ) ? chunk_len : 0 ;
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+ xfer .tx_length = spi_context_tx_buf_on (ctx ) ? chunk_len : 0 ;
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+ xfer .rx_length = spi_context_rx_buf_on (ctx ) ? chunk_len : 0 ;
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+
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+ error = dmm_buffer_out_prepare (dev_config -> mem_reg , tx_buf , xfer .tx_length ,
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+ (void * * )& xfer .p_tx_buffer );
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+ if (error != 0 ) {
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+ goto out_alloc_failed ;
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+ }
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+
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+ error = dmm_buffer_in_prepare (dev_config -> mem_reg , rx_buf , xfer .rx_length ,
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+ (void * * )& xfer .p_rx_buffer );
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+ if (error != 0 ) {
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+ goto in_alloc_failed ;
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+ }
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#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58
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if (xfer .rx_length == 1 && xfer .tx_length <= 1 ) {
@@ -561,18 +565,24 @@ static void transfer_next_chunk(const struct device *dev)
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anomaly_58_workaround_clear (dev_data );
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#endif
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}
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+
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+ /* On nrfx_spim_xfer() error */
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+ dmm_buffer_in_release (dev_config -> mem_reg , rx_buf , xfer .rx_length ,
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+ (void * * )& xfer .p_rx_buffer );
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+ in_alloc_failed :
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+ dmm_buffer_out_release (dev_config -> mem_reg , (void * * )& xfer .p_tx_buffer );
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}
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+ out_alloc_failed :
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+
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finish_transaction (dev , error );
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}
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static void event_handler (const nrfx_spim_evt_t * p_event , void * p_context )
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{
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const struct device * dev = p_context ;
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struct spi_nrfx_data * dev_data = dev -> data ;
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- #ifdef CONFIG_DCACHE
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const struct spi_nrfx_config * dev_config = dev -> config ;
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- #endif
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if (p_event -> type == NRFX_SPIM_EVENT_DONE ) {
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/* Chunk length is set to 0 when a transaction is aborted
@@ -586,15 +596,21 @@ static void event_handler(const nrfx_spim_evt_t *p_event, void *p_context)
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#ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58
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anomaly_58_workaround_clear (dev_data );
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#endif
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+
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+ if (spi_context_tx_buf_on (& dev_data -> ctx )) {
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+ dmm_buffer_out_release (dev_config -> mem_reg ,
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+ (void * * )p_event -> xfer_desc .p_tx_buffer );
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+ }
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+
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+ if (spi_context_rx_buf_on (& dev_data -> ctx )) {
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+ dmm_buffer_in_release (dev_config -> mem_reg , dev_data -> ctx .rx_buf ,
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+ dev_data -> chunk_len , p_event -> xfer_desc .p_rx_buffer );
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+ }
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+
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#ifdef SPI_BUFFER_IN_RAM
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if (spi_context_rx_buf_on (& dev_data -> ctx ) &&
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p_event -> xfer_desc .p_rx_buffer != NULL &&
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p_event -> xfer_desc .p_rx_buffer != dev_data -> ctx .rx_buf ) {
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- #ifdef CONFIG_DCACHE
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- if (dev_config -> mem_attr & DT_MEM_CACHEABLE ) {
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- sys_cache_data_invd_range (dev_data -> rx_buffer , dev_data -> chunk_len );
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- }
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- #endif
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(void )memcpy (dev_data -> ctx .rx_buf ,
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dev_data -> rx_buffer ,
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dev_data -> chunk_len );
@@ -882,8 +898,6 @@ static int spi_nrfx_deinit(const struct device *dev)
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return 0 ;
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}
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- #define SPIM_MEM_REGION (idx ) DT_PHANDLE(SPIM(idx), memory_regions)
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-
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#define SPI_NRFX_SPIM_EXTENDED_CONFIG (idx ) \
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IF_ENABLED(NRFX_SPIM_EXTENDED_ENABLED, \
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(.dcx_pin = NRF_SPIM_PIN_NOT_CONNECTED, \
@@ -892,13 +906,6 @@ static int spi_nrfx_deinit(const struct device *dev)
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()) \
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))
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- #define SPIM_GET_MEM_ATTR (idx ) \
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- COND_CODE_1(SPIM_HAS_PROP(idx, memory_regions), \
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- (COND_CODE_1(DT_NODE_HAS_PROP(SPIM_MEM_REGION(idx), zephyr_memory_attr), \
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- (DT_PROP(SPIM_MEM_REGION(idx), zephyr_memory_attr)), \
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- (0))), \
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- (0))
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-
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/* Get initialization priority of an instance. Instances that requires clock control
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* which is using nrfs (IPC) are initialized later.
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*/
@@ -918,10 +925,10 @@ static int spi_nrfx_deinit(const struct device *dev)
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IF_ENABLED(SPI_BUFFER_IN_RAM, \
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(static uint8_t spim_##idx##_tx_buffer \
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[CONFIG_SPI_NRFX_RAM_BUFFER_SIZE] \
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- SPIM_MEMORY_SECTION( idx); \
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+ DMM_MEMORY_SECTION(SPIM( idx) ); \
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static uint8_t spim_##idx##_rx_buffer \
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[CONFIG_SPI_NRFX_RAM_BUFFER_SIZE] \
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- SPIM_MEMORY_SECTION( idx);)) \
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+ DMM_MEMORY_SECTION(SPIM( idx)) ;)) \
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static struct spi_nrfx_data spi_##idx##_data = { \
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IF_ENABLED(CONFIG_MULTITHREADING, \
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(SPI_CONTEXT_INIT_LOCK(spi_##idx##_data, ctx),)) \
@@ -958,8 +965,6 @@ static int spi_nrfx_deinit(const struct device *dev)
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.wake_pin = NRF_DT_GPIOS_TO_PSEL_OR(SPIM(idx), wake_gpios, \
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WAKE_PIN_NOT_USED), \
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.wake_gpiote = WAKE_GPIOTE_INSTANCE(SPIM(idx)), \
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- IF_ENABLED(CONFIG_DCACHE, \
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- (.mem_attr = SPIM_GET_MEM_ATTR(idx),)) \
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IF_ENABLED(SPIM_ANY_FAST, \
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(.clk_dev = DEVICE_DT_GET_OR_NULL( \
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DT_CLOCKS_CTLR(SPIM(idx))), \
@@ -971,6 +976,7 @@ static int spi_nrfx_deinit(const struct device *dev)
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.default_port = \
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DT_PROP_OR(DT_PHANDLE(SPIM(idx), \
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default_gpio_port), port, -1),)) \
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+ .mem_reg = DMM_DEV_TO_REG(SPIM(idx)), \
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}; \
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BUILD_ASSERT(!SPIM_HAS_PROP(idx, wake_gpios) || \
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!(DT_GPIO_FLAGS(SPIM(idx), wake_gpios) & GPIO_ACTIVE_LOW),\
@@ -985,12 +991,6 @@ static int spi_nrfx_deinit(const struct device *dev)
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POST_KERNEL, SPIM_INIT_PRIORITY(idx), \
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&spi_nrfx_driver_api)
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- #define SPIM_MEMORY_SECTION (idx ) \
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- COND_CODE_1(SPIM_HAS_PROP(idx, memory_regions), \
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- (__attribute__((__section__(LINKER_DT_NODE_REGION_NAME( \
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- SPIM_MEM_REGION(idx)))))), \
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- ())
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-
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#define COND_NRF_SPIM_DEVICE (unused , prefix , i , _ ) \
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IF_ENABLED(CONFIG_HAS_HW_NRF_SPIM##prefix##i, (SPI_NRFX_SPIM_DEFINE(prefix##i);))
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