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Merge pull request #68 from rust-embedded/new-releases
New releases of everything
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‎arm-targets/CHANGELOG.md‎

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@@ -7,9 +7,15 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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## [Unreleased]
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## [v0.3.0]
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### Added
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- Added support for legacy Arm targets: Armv5TE and Armv4T, including proper arch, isa, and profile handling.
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- Support for legacy Arm targets: Armv5TE and Armv4T
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- Additional documentation
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- ABI type (either EABI or EABIHF)
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- Simple CLI tool
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- Some unit tests
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## [v0.2.0]
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Initial release
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/arm-targets-v0.2.0...HEAD
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/arm-targets-v0.3.0...HEAD
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[v0.3.0]: https://github.com/rust-embedded/cortex-ar/compare/arm-targets-v0.2.0...arm-targets-v0.3.0
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[v0.2.0]: https://github.com/rust-embedded/cortex-ar/compare/arm-targets-v0.1.0...arm-targets-v0.2.0
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[v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/arm-targets-v0.1.0

‎arm-targets/Cargo.toml‎

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@@ -12,6 +12,6 @@ readme = "README.md"
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repository = "https://github.com/rust-embedded/cortex-ar.git"
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homepage = "https://github.com/rust-embedded/cortex-ar.git"
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rust-version = "1.59"
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version = "0.2.0"
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version = "0.3.0"
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[dependencies]

‎cortex-a-rt/CHANGELOG.md‎

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@@ -7,7 +7,12 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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## [Unreleased]
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No changes
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## [v0.1.2]
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### Changed
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- MSRV is now Rust 1.83
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- Uses cortex-ar 0.3
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## [v0.1.1]
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‎cortex-a-rt/Cargo.toml‎

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repository = "https://github.com/rust-embedded/cortex-ar.git"
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homepage = "https://github.com/rust-embedded/cortex-ar.git"
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rust-version = "1.83"
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version = "0.1.1"
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version = "0.1.2"
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[dependencies]
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cortex-ar = {version = "0.2.0", path = "../cortex-ar"}
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cortex-ar-rt-macros = { path = "../cortex-ar-rt-macros", version = "=0.1.0" }
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cortex-ar = { version = "0.3.0", path = "../cortex-ar" }
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cortex-ar-rt-macros = { path = "../cortex-ar-rt-macros", version = "=0.1.1" }
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[features]
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# Enable the FPU on start-up, even on a soft-float EABI target
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vfp-dp = []
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[build-dependencies]
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arm-targets = {version = "0.2.0", path = "../arm-targets"}
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arm-targets = { version = "0.3.0", path = "../arm-targets" }
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[package.metadata.docs.rs]
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targets = ["armv7a-none-eabi"]

‎cortex-ar-rt-macros/CHANGELOG.md‎

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## [Unreleased]
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No changes
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## [v0.1.1]
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- Correctly note MSRV as 1.83
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## [v0.1.0]
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Initial release
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-rt-macros-v0.1.0...HEAD
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-rt-macros-v0.1.1...HEAD
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[v0.1.1]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-rt-macros-v0.1.0...cortex-ar-rt-macros-v0.1.1
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[v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/cortex-ar-rt-macros-v0.1.0

‎cortex-ar-rt-macros/Cargo.toml‎

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repository = "https://github.com/rust-embedded/cortex-ar.git"
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homepage = "https://github.com/rust-embedded/cortex-ar.git"
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rust-version = "1.83"
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version = "0.1.0"
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version = "0.1.1"
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[lib]
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proc-macro = true

‎cortex-ar/CHANGELOG.md‎

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## [Unreleased]
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## [v0.3.0]
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- Bumped MSRV for `cortex-ar` to v1.83 to allow compatibility with `arbitrary-int` v2.
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- `dmb` data memory barrier in ASM module.
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- API for inner cache maintenance as part of the new `cache` module. This includes functions to
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completely clean, invalidate or clean & invalidate the L1 data cache or perform data cache
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maintenance by MVA (specific address).
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- Added new `L1Section::set_section_attrs` and `L1Section::section_attrs` method. Also added
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low-level `L1Section::new_with_addr_upper_bits_and_attrs` constructor.
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- API for inner cache maintenance as part of the new `cache` module. This
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includes functions to completely clean, invalidate or clean & invalidate the
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L1 data cache or perform data cache maintenance by MVA (specific address).
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- new `L1Section::set_section_attrs` and `L1Section::section_attrs` method,
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and low-level `L1Section::new_with_addr_upper_bits_and_attrs` constructor
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- `Debug`, `Copy`, `Clone` derives for all system register types
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- optional `serde` derives behind a `serde` feature gate
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- lots of missing `Debug`, `Copy`, `Clone`, `defmt::Format` derives.
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- optional `defmt::Format` derives behind a `defmt` feature gate
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### Changed
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Initial release
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-v0.2.0...HEAD
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-v0.3.0...HEAD
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[v0.3.0]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-v0.2.0...cortex-ar-v0.3.0
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[v0.2.0]: https://github.com/rust-embedded/cortex-ar/compare/cortex-ar-v0.1.0...cortex-ar-v0.2.0
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[v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/cortex-ar-v0.1.0

‎cortex-ar/Cargo.toml‎

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repository = "https://github.com/rust-embedded/cortex-ar.git"
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homepage = "https://github.com/rust-embedded/cortex-ar.git"
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rust-version = "1.83"
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version = "0.2.0"
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version = "0.3.0"
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[dependencies]
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arbitrary-int = "2"
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serde = { version = "1", features = ["derive"], default-features = false, optional = true }
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[build-dependencies]
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arm-targets = {version = "0.2.0", path = "../arm-targets"}
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arm-targets = { version = "0.3.0", path = "../arm-targets" }
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# Adds a critical-section implementation that only disables interrupts.

‎cortex-r-rt/CHANGELOG.md‎

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## [Unreleased]
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- No changes
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## [v0.2.1]
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### Changed
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- MSRV is now Rust 1.83
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- Uses cortex-ar 0.3
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## [v0.2.0]
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## Added
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### Added
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- Added ABT und UND mode stack setup.
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- Default exception handlers for undefined, prefetch abort and data abort exceptions
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- SMP support
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- Zeroing of registers on start-up
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- `#[entry]` and `#[exception]` and `#[interrupt]` macros
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## Changed
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### Changed
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- Fixed interrupt handler so interrupts can be re-entrant
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- Default Rust exception handler is now an empty permanent loop instead of a semihosting exit.
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Initial release
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-r-rt-v0.2.0...HEAD
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[Unreleased]: https://github.com/rust-embedded/cortex-ar/compare/cortex-r-rt-v0.2.1...HEAD
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[v0.2.1]: https://github.com/rust-embedded/cortex-ar/compare/cortex-r-rt-v0.2.0...cortex-r-rt-v0.2.1
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[v0.2.0]: https://github.com/rust-embedded/cortex-ar/compare/cortex-r-rt-v0.1.0...cortex-r-rt-v0.2.0
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[v0.1.0]: https://github.com/rust-embedded/cortex-ar/releases/tag/cortex-r-rt-v0.1.0

‎cortex-r-rt/Cargo.toml‎

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readme = "README.md"
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repository = "https://github.com/rust-embedded/cortex-r.git"
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rust-version = "1.83"
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version = "0.2.0"
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version = "0.2.1"
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[dependencies]
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cortex-ar = {version = "0.2.0", path = "../cortex-ar"}
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cortex-ar-rt-macros = {path = "../cortex-ar-rt-macros", version = "=0.1.0"}
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cortex-ar = { version = "0.3.0", path = "../cortex-ar" }
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cortex-ar-rt-macros = { path = "../cortex-ar-rt-macros", version = "=0.1.1" }
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[features]
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# Enable the FPU on start-up, even on a soft-float EABI target
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eabi-fpu = []
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[build-dependencies]
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arm-targets = {version = "0.2.0", path = "../arm-targets"}
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arm-targets = { version = "0.3.0", path = "../arm-targets" }
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[package.metadata.docs.rs]
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targets = ["armv7r-none-eabihf", "armv7r-none-eabihf"]

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