typo

Author: nicolo-ribaudo

spec.html

@@ -27061,7 +27061,7 @@ <h1>
             ModuleGraphDFS(
               _root_: a Cyclic Module Record,
               _initialStatus_: ~unlinked~ or ~linked~,
-              _pendingSatus_: ~linking~ or ~evaluating~,
+              _pendingStatus_: ~linking~ or ~evaluating~,
               _action_: an Abstract Closure,
               _completeSCC_: an Abstract Closure,
               _postErrorCleanup_: an Abstract Closure,
@@ -27072,7 +27072,7 @@ <h1>
             <dd>It synchronously traverses the module graph starting from _root_, in depth-first order, handling strongly connected components and subgraphs that have already been handled by previous ModuleGraphDFS calls.</dd>
           </dl>
 
-          <p>_initialStatus_ and _pendingSatus_ are the possible values of Cyclic Module Records' [[Status]] field to mark them respectively as yet to be handled by this graph traversal, or currently being handled. If a module has a different [[Status]] value it is assumed to have already been handled by a previous ModuleGraphDFS call.</p>
+          <p>_initialStatus_ and _pendingStatus_ are the possible values of Cyclic Module Records' [[Status]] field to mark them respectively as yet to be handled by this graph traversal, or currently being handled. If a module has a different [[Status]] value it is assumed to have already been handled by a previous ModuleGraphDFS call.</p>
 
           <p>The _action_, _completeSCC_ and _postErrorCleanup_ are called on individual modules at different points during the graph traversal:</p>
 
@@ -27088,15 +27088,15 @@ <h1>
 
           <emu-alg>
             1. Let _stack_ be a new empty List.
-            1. Let _result_ be Completion(InnerModuleGraphDFS(_root_, _stack_, 0, _initialStatus_, _pendingSatus_, _action_, _completeSCC_)).
+            1. Let _result_ be Completion(InnerModuleGraphDFS(_root_, _stack_, 0, _initialStatus_, _pendingStatus_, _action_, _completeSCC_)).
             1. If _result_ is an abrupt completion, then
               1. For each Cyclic Module Record _module_ of _stack_, do
-                1. Assert: _module_.[[Status]] is _pendingSatus_.
+                1. Assert: _module_.[[Status]] is _pendingStatus_.
                 1. Perform _postErrorCleanup_(_module_, _result_).
-                1. Assert: _module_.[[Status]] is not _pendingSatus_.
-              1. Assert: _root_.[[Status]] is not _pendingSatus_.
+                1. Assert: _module_.[[Status]] is not _pendingStatus_.
+              1. Assert: _root_.[[Status]] is not _pendingStatus_.
               1. Return Completion(_result_).
-            1. Assert: _root_.[[Status]] is not _initialStatus_ or _pendingSatus_.
+            1. Assert: _root_.[[Status]] is not _initialStatus_ or _pendingStatus_.
             1. Assert: _stack_ is empty.
             1. Return ~unused~.
           </emu-alg>
@@ -27108,7 +27108,7 @@ <h1>
                 _stack_: a List of Cyclic Module Records,
                 _index_: a non-negative integer,
                 _initialStatus_: ~unlinked~ or ~linked~,
-                _pendingSatus_: ~linking~ or ~evaluating~,
+                _pendingStatus_: ~linking~ or ~evaluating~,
                 _action_: an Abstract Closure,
                 _completeSCC_: an Abstract Closure,
               ): either a normal completion containing a non-negative integer or a throw completion
@@ -27122,23 +27122,23 @@ <h1>
               1. If _module_ is not a Cyclic Module Record, then
                 1. Perform ? _action_(_module_).
                 1. Return _index_.
-              1. If _module_.[[Status]] is _pendingSatus_, return _index_.
+              1. If _module_.[[Status]] is _pendingStatus_, return _index_.
               1. If _module_.[[Status]] is not _initialStatus_, then
                 1. Perform ? _action_(_module_).
                 1. Return _index_.
               1. Assert: _module_.[[Status]] is _initialStatus_.
-              1. Set _module_.[[Status]] to _pendingSatus_.
+              1. Set _module_.[[Status]] to _pendingStatus_.
               1. Let _moduleIndex_ be _index_.
               1. Set _module_.[[DFSAncestorIndex]] to _index_.
               1. Set _index_ to _index_ + 1.
               1. Append _module_ to _stack_.
               1. For each ModuleRequest Record _request_ of _module_.[[RequestedModules]], do
                 1. Let _requiredModule_ be GetImportedModule(_module_, _request_).
-                1. Set _index_ to ? InnerModuleGraphDFS(_requiredModule_, _stack_, _index_, _initialStatus_, _pendingSatus_, _action_, _completeSCC_).
+                1. Set _index_ to ? InnerModuleGraphDFS(_requiredModule_, _stack_, _index_, _initialStatus_, _pendingStatus_, _action_, _completeSCC_).
                 1. If _requiredModule_ is a Cyclic Module Record, then
                   1. Assert: _requiredModule_.[[Status]] is not _initialStatus_.
-                  1. Assert: _requiredModule_.[[Status]] is _pendingSatus_ if and only if _stack_ contains _requiredModule_.
-                  1. If _requiredModule_.[[Status]] is _pendingSatus_, then
+                  1. Assert: _requiredModule_.[[Status]] is _pendingStatus_ if and only if _stack_ contains _requiredModule_.
+                  1. If _requiredModule_.[[Status]] is _pendingStatus_, then
                     1. Set _module_.[[DFSAncestorIndex]] to min(_module_.[[DFSAncestorIndex]], _requiredModule_.[[DFSAncestorIndex]]).
               1. Perform ? _action_(_module_).
               1. Assert: _module_ occurs exactly once in _stack_.
@@ -27149,9 +27149,9 @@ <h1>
                   1. Let _requiredModule_ be the last element of _stack_.
                   1. Remove the last element of _stack_.
                   1. Assert: _requiredModule_ is a Cyclic Module Record.
-                  1. Assert: _requiredModule_.[[Status]] is _pendingSatus_.
+                  1. Assert: _requiredModule_.[[Status]] is _pendingStatus_.
                   1. Perform _completeSCC_(_requiredModule_, _module_).
-                  1. Assert: _requiredModule_.[[Status]] is not _pendingSatus_.
+                  1. Assert: _requiredModule_.[[Status]] is not _pendingStatus_.
                   1. If _requiredModule_ and _module_ are the same Module Record, set _done_ to *true*.
               1. Return _index_.
             </emu-alg>