MMU in CPM3 - Question for Udo

[Retro-Tech-Reboot]

I'm curious how banked memory for CPM3 is implemented. I see a MMUSEL equate in bnkbio3.asm that defines port 0x40. Is the MMU implementation based on an actual S-100 card? If so, can I ask what card?
-Neil

[bhall66]

Neil,

In CP/M 3, RAM bank access is implemented with a few system calls including SELMEM and SETBNK. See source code (https://github.com/udo-munk/z80pack/blob/master/imsaisim/srccpm3/bnkbios3.asm). XMOVE is not implemented. I put MMU conceptual details in the second half of this writeup: http://w8bh.net/ImsaiBanks.pdf

I do not know if the MMU emulates any particular S-100 hardware.

Bruce.

[udo-munk]

That is a very simple MMU implementation with x 48 KB pages and one 16 KB common page. This scheme was implemented in lots of systems and is well supported by CP/M 3 and MP/M, so I used that. Also port 40 was used by several boards, mainly Cromemco, but there the MMU is quite different.

[Retro-Tech-Reboot]

Thanks.

[udo-munk]

BTW, there is an advertisement from IMSAI for a system with 1 MB memory, but just that and no technical details how they implemented this. Also the costs for such a machine were exorbitant, I guess no one had one other than IMSAI them self.

[udo-munk]

Here I archived the manual for a 256KB S100 memory board, where the MMU can be configured for Cromix and the usual 16 KB common and 48 KB user banks, as needed for MP/M and CP/M 3:
https://www.icl1900.co.uk/unix4fun/z80pack/ftp/cromemco/256K%20RAM%20Manual.pdf
That was the only manual I ever found that explains the MMU needed for Cromix, the manuals for Cromemco memory boards don't explain this. The MMU's in the IMSAI 8080 and Cromemco-Z1 were implemented close to this documentation, might also help to understand memory management in the systems some better.