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Merge pull request #5467 from bardliao/merge/sound-upstream-20250626
Merge/sound upstream 20250626
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.mailmap

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@@ -197,6 +197,7 @@ Daniel Borkmann <[email protected]> <[email protected]>
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David Brownell <[email protected]>
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@@ -282,6 +283,7 @@ Gustavo Padovan <[email protected]>
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Gustavo Padovan <[email protected]>
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@@ -691,9 +693,10 @@ Serge Hallyn <[email protected]> <[email protected]>
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Sharath Chandra Vurukala <[email protected]> <[email protected]>
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Documentation/admin-guide/pm/cpufreq.rst

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@@ -398,7 +398,9 @@ policy limits change after that.
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This governor does not do anything by itself. Instead, it allows user space
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to set the CPU frequency for the policy it is attached to by writing to the
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``scaling_setspeed`` attribute of that policy.
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``scaling_setspeed`` attribute of that policy. Though the intention may be to
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set an exact frequency for the policy, the actual frequency may vary depending
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on hardware coordination, thermal and power limits, and other factors.
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``schedutil``
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-------------

Documentation/arch/arm64/booting.rst

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@@ -234,7 +234,7 @@ Before jumping into the kernel, the following conditions must be met:
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- If the kernel is entered at EL1:
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- ICC.SRE_EL2.Enable (bit 3) must be initialised to 0b1
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- ICC_SRE_EL2.Enable (bit 3) must be initialised to 0b1
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- ICC_SRE_EL2.SRE (bit 0) must be initialised to 0b1.
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- The DT or ACPI tables must describe a GICv3 interrupt controller.

Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml

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resets:
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items:
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- description: module reset
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- description:
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Module reset. This property is optional for controllers in Tegra194,
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Tegra234 etc where an internal software reset is available as an
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alternative.
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reset-names:
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items:
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- const: rx
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- const: tx
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml
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- if:
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properties:
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power-domains: false
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- if:
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not:
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properties:
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compatible:
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contains:
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enum:
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- nvidia,tegra194-i2c
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then:
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required:
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- resets
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- reset-names
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unevaluatedProperties: false
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examples:

Documentation/devicetree/bindings/pmem/pmem-region.txt

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pmem-region.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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maintainers:
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- Oliver O'Halloran <[email protected]>
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title: Persistent Memory Regions
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description: |
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Persistent memory refers to a class of memory devices that are:
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a) Usable as main system memory (i.e. cacheable), and
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b) Retain their contents across power failure.
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Given b) it is best to think of persistent memory as a kind of memory mapped
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storage device. To ensure data integrity the operating system needs to manage
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persistent regions separately to the normal memory pool. To aid with that this
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binding provides a standardised interface for discovering where persistent
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memory regions exist inside the physical address space.
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properties:
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compatible:
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const: pmem-region
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reg:
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maxItems: 1
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volatile:
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description:
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Indicates the region is volatile (non-persistent) and the OS can skip
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cache flushes for writes
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type: boolean
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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pmem@5000 {
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compatible = "pmem-region";
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reg = <0x00005000 0x00001000>;
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};

Documentation/devicetree/bindings/sound/cirrus,cs42xx8.yaml

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description: This pin is connected to the chip's RESET pin.
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maxItems: 1
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port:
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$ref: audio-graph-port.yaml#
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unevaluatedProperties: false
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required:
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- compatible
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- reg

Documentation/firmware-guide/acpi/apei/einj.rst

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0x00000200 Platform Correctable
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0x00000400 Platform Uncorrectable non-fatal
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0x00000800 Platform Uncorrectable fatal
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V2_0x00000001 EINJV2 Processor Error
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V2_0x00000002 EINJV2 Memory Error
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V2_0x00000004 EINJV2 PCI Express Error
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================ ===================================
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The format of the file contents are as above, except present are only
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Memory address and mask valid (param1 and param2).
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PCIe (seg,bus,dev,fn) valid (see param4 below).
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Bit 3
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EINJv2 extension structure is valid
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If set to zero, legacy behavior is mimicked where the type of
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injection specifies just one bit set, and param1 is multiplexed.
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this actually works depends on what operations the BIOS actually
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includes in the trigger phase.
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- component_id0 .. component_idN, component_syndrome0 .. component_syndromeN
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These files are used to set the "Component Array" field
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of the EINJv2 Extension Structure. Each holds a 128-bit
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hex value. Writing just a newline to any of these files
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sets an invalid (all-ones) value.
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CXL error types are supported from ACPI 6.5 onwards (given a CXL port
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An EINJv2 error injection example::
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# cd /sys/kernel/debug/apei/einj
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# cat available_error_type # See which errors can be injected
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0x00000002 Processor Uncorrectable non-fatal
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0x00000008 Memory Correctable
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0x00000010 Memory Uncorrectable non-fatal
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V2_0x00000001 EINJV2 Processor Error
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V2_0x00000002 EINJV2 Memory Error
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# echo 0x12345000 > param1 # Set memory address for injection
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# echo 0xfffffffffffff000 > param2 # Range - anywhere in this page
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# echo 0x1 > component_id0 # First device ID
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# echo 0x4 > component_syndrome0 # First error syndrome
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# echo 0x2 > component_id1 # Second device ID
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# echo 0x4 > component_syndrome1 # Second error syndrome
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# echo '' > component_id2 # Mark id2 invalid to terminate list
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# echo V2_0x2 > error_type # Choose EINJv2 memory error
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# echo 0xa > flags # set flags to indicate EINJv2
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# echo 1 > error_inject # Inject now
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[22715.830801] EDAC sbridge MC3: HANDLING MCE MEMORY ERROR

Documentation/gpu/nouveau.rst

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GSP Support
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.. kernel-doc:: drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c
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.. kernel-doc:: drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/rpc.c
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:doc: GSP message queue element
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.. kernel-doc:: drivers/gpu/drm/nouveau/include/nvkm/subdev/gsp.h

Documentation/netlink/specs/ethtool.yaml

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doc: Partial family for Ethtool Netlink.
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uapi-header: linux/ethtool_netlink_generated.h
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c-family-name: ethtool-genl-name
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c-version-name: ethtool-genl-version
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definitions:
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name: udp-tunnel-type

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