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10 files changed

+53
-48
lines changed

10 files changed

+53
-48
lines changed

‎libs/libarchfpga/src/arch_util.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -545,7 +545,7 @@ void ProcessLutClass(t_pb_type* lut_pb_type) {
545545
for (size_t i = 0; i < num_annotations; i++) {
546546
lut_pb_type->modes[0].interconnect[0].annotations[i].clock = lut_pb_type->annotations[i].clock;
547547
lut_pb_type->modes[0].interconnect[0].annotations[i].input_pins = lut_pb_type->annotations[i].input_pins;
548-
lut_pb_type->modes[0].interconnect[0].annotations[i].output_pins =lut_pb_type->annotations[i].output_pins;
548+
lut_pb_type->modes[0].interconnect[0].annotations[i].output_pins = lut_pb_type->annotations[i].output_pins;
549549
lut_pb_type->modes[0].interconnect[0].annotations[i].line_num = lut_pb_type->annotations[i].line_num;
550550
lut_pb_type->modes[0].interconnect[0].annotations[i].format = lut_pb_type->annotations[i].format;
551551
lut_pb_type->modes[0].interconnect[0].annotations[i].type = lut_pb_type->annotations[i].type;

‎libs/libarchfpga/src/read_xml_arch_file.cpp‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3489,7 +3489,8 @@ static void process_pin_locations(pugi::xml_node Locations,
34893489
if ((y_offset < 0) || (y_offset >= physical_tile_type->height)) {
34903490
archfpga_throw(loc_data.filename_c_str(), loc_data.line(cur),
34913491
vtr::string_fmt("'%d' is an invalid vertical offset for type '%s' (must be within [0, %d]).\n",
3492-
y_offset, physical_tile_type->name.c_str(), physical_tile_type->height - 1).c_str());
3492+
y_offset, physical_tile_type->name.c_str(), physical_tile_type->height - 1)
3493+
.c_str());
34933494
}
34943495

34953496
// Check for duplicate side specifications, since the code below silently overwrites if there are duplicates
@@ -3635,7 +3636,8 @@ static void process_sub_tiles(pugi::xml_node node,
36353636
archfpga_throw(loc_data.filename_c_str(), loc_data.line(node),
36363637
vtr::string_fmt("No sub tile found for the Physical Tile %s.\n"
36373638
"At least one sub tile is needed to correctly describe the Physical Tile.\n",
3638-
physical_tile_type->name.c_str()).c_str());
3639+
physical_tile_type->name.c_str())
3640+
.c_str());
36393641
}
36403642

36413643
// used to find duplicate subtile names

‎vpr/src/base/CheckArch.cpp‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -43,10 +43,9 @@ static void CheckSwitches(const t_arch& Arch) {
4343
}
4444
}
4545

46-
4746
// find the ipin cblock switch index, if it exists
4847
if (Arch.switches[i].name == Arch.ipin_cblock_switch_name) {
49-
ipin_cblock_switch_index = i;
48+
ipin_cblock_switch_index = i;
5049
}
5150
}
5251

‎vpr/src/route/rr_graph_generation/build_scatter_gathers.cpp‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -399,8 +399,10 @@ void convert_interposer_cuts_to_sg_patterns(const std::vector<t_layer_def>& inte
399399
void compute_non_3d_sg_link_geometry(const t_physical_tile_loc& src_loc,
400400
const t_physical_tile_loc& dst_loc,
401401
e_rr_type& chan_type,
402-
int& xlow, int& xhigh,
403-
int& ylow, int& yhigh,
402+
int& xlow,
403+
int& xhigh,
404+
int& ylow,
405+
int& yhigh,
404406
Direction& direction) {
405407
VTR_ASSERT_SAFE(src_loc.layer_num == dst_loc.layer_num);
406408

@@ -431,4 +433,4 @@ void compute_non_3d_sg_link_geometry(const t_physical_tile_loc& src_loc,
431433
} else {
432434
VTR_ASSERT_MSG(false, "Source and destination locations cannot be identical");
433435
}
434-
}
436+
}

‎vpr/src/route/rr_graph_generation/build_scatter_gathers.h‎

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -78,12 +78,14 @@ void convert_interposer_cuts_to_sg_patterns(const std::vector<t_layer_def>& inte
7878
std::vector<t_scatter_gather_pattern>& sg_patterns);
7979

8080
/**
81-
* @brief Computes the channel type, direction, and coordinate span between two locations
82-
* on the same layer. Used by SG link construction routines to determine geometry.
83-
*/
81+
* @brief Computes the channel type, direction, and coordinate span between two locations
82+
* on the same layer. Used by SG link construction routines to determine geometry.
83+
*/
8484
void compute_non_3d_sg_link_geometry(const t_physical_tile_loc& src_loc,
8585
const t_physical_tile_loc& dst_loc,
8686
e_rr_type& chan_type,
87-
int& xlow, int& xhigh,
88-
int& ylow, int& yhigh,
89-
Direction& direction);
87+
int& xlow,
88+
int& xhigh,
89+
int& ylow,
90+
int& yhigh,
91+
Direction& direction);

‎vpr/src/route/rr_graph_generation/rr_graph.cpp‎

Lines changed: 25 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -1498,12 +1498,12 @@ static std::function<void(t_chan_width*)> alloc_and_load_rr_graph(RRGraphBuilder
14981498
}
14991499

15001500
add_edges_opin_chanz(rr_graph,
1501-
layer, i, j,
1502-
Fc_out,
1503-
seg_index_map,
1504-
num_seg_types,
1505-
rr_edges_to_create,
1506-
interdie_3d_links[i][j]);
1501+
layer, i, j,
1502+
Fc_out,
1503+
seg_index_map,
1504+
num_seg_types,
1505+
rr_edges_to_create,
1506+
interdie_3d_links[i][j]);
15071507

15081508
// Create the actual OPIN->CHANX/CHANY edges
15091509
uniquify_edges(rr_edges_to_create);
@@ -1993,10 +1993,10 @@ static vtr::NdMatrix<std::vector<int>, 4> alloc_and_load_pin_to_track_map(const
19931993
// allocate 'result' matrix and initialize entries to UNDEFINED. also allocate and initialize matrix which will be used
19941994
// to index into the correct entries when loading up 'result'
19951995
auto result = vtr::NdMatrix<std::vector<int>, 4>({
1996-
size_t(tile_type->num_pins), //[0..num_pins-1]
1997-
size_t(tile_type->width), //[0..width-1]
1998-
size_t(tile_type->height), //[0..height-1]
1999-
4, //[0..sides-1]
1996+
size_t(tile_type->num_pins), //[0..num_pins-1]
1997+
size_t(tile_type->width), //[0..width-1]
1998+
size_t(tile_type->height), //[0..height-1]
1999+
4, //[0..sides-1]
20002000
});
20012001

20022002
// multiplier for unidirectional vs bidirectional architectures
@@ -2074,11 +2074,11 @@ static vtr::NdMatrix<int, 5> alloc_and_load_pin_to_seg_type(const e_pin_type pin
20742074
}
20752075

20762076
auto tracks_connected_to_pin = vtr::NdMatrix<int, 5>({
2077-
size_t(tile_type->num_pins), // [0..num_pins-1]
2078-
size_t(tile_type->width), // [0..width-1]
2079-
size_t(tile_type->height), // [0..height-1]
2080-
NUM_2D_SIDES, // [0..NUM_2D_SIDES-1]
2081-
size_t(max_Fc) // [0..Fc-1]
2077+
size_t(tile_type->num_pins), // [0..num_pins-1]
2078+
size_t(tile_type->width), // [0..width-1]
2079+
size_t(tile_type->height), // [0..height-1]
2080+
NUM_2D_SIDES, // [0..NUM_2D_SIDES-1]
2081+
size_t(max_Fc) // [0..Fc-1]
20822082
},
20832083
UNDEFINED); // Unconnected
20842084

@@ -2087,9 +2087,9 @@ static vtr::NdMatrix<int, 5> alloc_and_load_pin_to_seg_type(const e_pin_type pin
20872087
// Type->num_pins) if a logical pin has multiple specified physical
20882088
// pinlocations (i.e. appears on multiple sides of the block)
20892089
auto num_dir = vtr::NdMatrix<int, 3>({
2090-
size_t(tile_type->width), // [0..width-1]
2091-
size_t(tile_type->height), // [0..height-1]
2092-
NUM_2D_SIDES // [0..NUM_2D_SIDES-1]
2090+
size_t(tile_type->width), // [0..width-1]
2091+
size_t(tile_type->height), // [0..height-1]
2092+
NUM_2D_SIDES // [0..NUM_2D_SIDES-1]
20932093
},
20942094
0);
20952095

@@ -2099,18 +2099,18 @@ static vtr::NdMatrix<int, 5> alloc_and_load_pin_to_seg_type(const e_pin_type pin
20992099
//
21002100
// Max possible space allocated for simplicity
21012101
auto dir_list = vtr::NdMatrix<int, 4>({
2102-
size_t(tile_type->width), // [0..width-1]
2103-
size_t(tile_type->height), // [0..height-1]
2104-
NUM_2D_SIDES, // [0..NUM_2D_SIDES-1]
2105-
size_t(tile_type->num_pins) // [0..num_pins * num_layers-1]
2102+
size_t(tile_type->width), // [0..width-1]
2103+
size_t(tile_type->height), // [0..height-1]
2104+
NUM_2D_SIDES, // [0..NUM_2D_SIDES-1]
2105+
size_t(tile_type->num_pins) // [0..num_pins * num_layers-1]
21062106
},
21072107
-1); // Defensive coding: Initialize to invalid
21082108

21092109
// Number of currently assigned physical pins
21102110
auto num_done_per_dir = vtr::NdMatrix<int, 3>({
2111-
size_t(tile_type->width), // [0..width-1]
2112-
size_t(tile_type->height), // [0..height-1]
2113-
NUM_2D_SIDES // [0..NUM_2D_SIDES-1]
2111+
size_t(tile_type->width), // [0..width-1]
2112+
size_t(tile_type->height), // [0..height-1]
2113+
NUM_2D_SIDES // [0..NUM_2D_SIDES-1]
21142114
},
21152115
0);
21162116

@@ -2124,7 +2124,6 @@ static vtr::NdMatrix<int, 5> alloc_and_load_pin_to_seg_type(const e_pin_type pin
21242124
if (tile_type->is_ignored_pin[pin])
21252125
continue;
21262126

2127-
21282127
for (int width = 0; width < tile_type->width; ++width) {
21292128
for (int height = 0; height < tile_type->height; ++height) {
21302129
for (e_side side : TOTAL_2D_SIDES) {
@@ -2195,7 +2194,6 @@ static vtr::NdMatrix<int, 5> alloc_and_load_pin_to_seg_type(const e_pin_type pin
21952194

21962195
VTR_ASSERT(pin == num_phys_pins);
21972196

2198-
21992197
if (perturb_switch_pattern) {
22002198
load_perturbed_connection_block_pattern(tracks_connected_to_pin,
22012199
pin_ordering,

‎vpr/src/route/rr_graph_generation/rr_graph2.cpp‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -130,7 +130,6 @@ static int vpr_to_phy_track(const int itrack,
130130
const t_chan_seg_details* seg_details,
131131
const enum e_directionality directionality);
132132

133-
134133
/**
135134
* @brief Identifies and labels all mux endpoints at a given channel segment coordinate.
136135
*

‎vpr/src/route/rr_graph_generation/rr_graph_sg.cpp‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -101,7 +101,9 @@ void build_inter_die_3d_rr_chan(RRGraphBuilder& rr_graph_builder,
101101
}
102102

103103
void add_edges_opin_chanz(const RRGraphView& rr_graph,
104-
int layer, int x, int y,
104+
int layer,
105+
int x,
106+
int y,
105107
const std::vector<vtr::Matrix<int>>& Fc_out,
106108
const t_unified_to_parallel_seg_index& seg_index_map,
107109
int num_seg_types,
@@ -175,7 +177,7 @@ void add_and_connect_non_3d_sg_links(RRGraphBuilder& rr_graph_builder,
175177
// SG links are confined to one layer (non-3D), but can run in X or Y.
176178
VTR_ASSERT_SAFE(src_loc.layer_num == dst_loc.layer_num);
177179
const int layer = src_loc.layer_num;
178-
compute_non_3d_sg_link_geometry(src_loc, dst_loc, chan_type, xlow, xhigh, ylow, yhigh,direction);
180+
compute_non_3d_sg_link_geometry(src_loc, dst_loc, chan_type, xlow, xhigh, ylow, yhigh, direction);
179181

180182
// Retrieve the node ID and track number allocated earlier
181183
const RRNodeId node_id = sg_node_indices[i].first;
@@ -234,4 +236,4 @@ void add_and_connect_non_3d_sg_links(RRGraphBuilder& rr_graph_builder,
234236
non_3d_sg_rr_edges_to_create.emplace_back(node_id, scatter_node, switch_index, false);
235237
}
236238
}
237-
}
239+
}

‎vpr/src/route/rr_graph_generation/rr_graph_sg.h‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,9 +31,10 @@ void add_inter_die_3d_edges(RRGraphBuilder& rr_graph_builder,
3131
const std::vector<t_bottleneck_link>& interdie_3d_links,
3232
t_rr_edge_info_set& interdie_3d_rr_edges_to_create);
3333

34-
3534
void add_edges_opin_chanz(const RRGraphView& rr_graph,
36-
int layer, int x, int y,
35+
int layer,
36+
int x,
37+
int y,
3738
const std::vector<vtr::Matrix<int>>& Fc_out,
3839
const t_unified_to_parallel_seg_index& seg_index_map,
3940
int num_seg_types,

‎vpr/src/route/rr_graph_generation/rr_node_indices.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -386,7 +386,7 @@ std::vector<std::pair<RRNodeId, int>> alloc_and_load_non_3d_sg_pattern_rr_node_i
386386

387387
// Step 1: Determine the channel type (CHANX/CHANY) and span coordinates
388388
const int layer = src_loc.layer_num;
389-
compute_non_3d_sg_link_geometry(src_loc, dst_loc, chan_type, xlow, xhigh, ylow, yhigh,direction);
389+
compute_non_3d_sg_link_geometry(src_loc, dst_loc, chan_type, xlow, xhigh, ylow, yhigh, direction);
390390

391391
// Select the appropriate ptc matrix for this channel type
392392
vtr::NdMatrix<int, 3>& ptc_matrix = (chan_type == e_rr_type::CHANX) ? chanx_ptc : chany_ptc;

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