CP-308875: set Xen PCI MMIO BAR to WB

The default for the Xen PCI MMIO BAR is UnCachable.
Setting this to WriteBack in the MTRR shows a massive performance improvement on AMD,
at least for Linux guests.

On Intel this is already set to WriteBack by Xen via another mechanism.

To be effective this also requires the corresponding [Xen
commit](https://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=22650d6054625be10172fe0c78b9cadd1a39bd63),
old versions will just ignore this xenstore key.

The optimization is not enabled by default in Xen due to the wide range of
guests it supports, but XAPI supports a much narrower set of guest OSes.

Setting the cache attribute to WB is done by setting UC=0.

Signed-off-by: Edwin Török <[email protected]>

Author: edwintorok

ocaml/xenopsd/scripts/qemu-wrapper

@@ -148,6 +148,7 @@ def main(argv):
 
     # don't allow hvmloader to change the lower MMIO hole size
     xenstore_write("/local/domain/%d/hvmloader/allow-memory-relocate" % domid, "0")
+    xenstore_write("/local/domain/%d/hvmloader/pci/xen-platform-pci-bar-uc" % domid, "0")
     # prepare the correct set of ACPI tables in hvmloader
     xenstore_write("/local/domain/%d/platform/device-model" % domid, "qemu_xen")