WIP

Author: serge-sans-paille

include/xsimd/arch/xsimd_altivec.hpp

@@ -798,7 +798,8 @@ namespace xsimd
         template <class A, class T, class... Values, class = typename std::enable_if<std::is_scalar<T>::value, void>::type>
         XSIMD_INLINE batch_bool<T, A> set(batch_bool<T, A> const&, requires_arch<altivec>, Values... values) noexcept
         {
-            return set(batch<T, A>(), A {}, static_cast<T>(values ? -1LL : 0LL)...).data;
+            static_assert(sizeof...(Values) == batch_bool<T, A>::size, "consistent init");
+            return typename batch_bool<T, A>::register_type { static_cast<decltype(std::declval<typename batch_bool<T, A>::register_type>()[0])>(values ? -1LL : 0LL)... };
         }
 
         // ssub

include/xsimd/types/xsimd_altivec_register.hpp

@@ -39,12 +39,22 @@ namespace xsimd
     namespace types
     {
 
-#define XSIMD_DECLARE_SIMD_BOOL_ALTIVEC_REGISTER(T, Tb) \
-    template <>                                         \
-    struct get_bool_simd_register<T, altivec>           \
-    {                                                   \
-        using type = __vector __bool Tb;                \
-    };                                                  \
+#define XSIMD_DECLARE_SIMD_BOOL_ALTIVEC_REGISTER(T, Tb)              \
+    template <>                                                      \
+    struct get_bool_simd_register<T, altivec>                        \
+    {                                                                \
+        struct type                                                  \
+        {                                                            \
+            using register_type = __vector __bool Tb;                \
+            register_type data;                                      \
+            type() = default;                                        \
+            type(register_type r)                                    \
+                : data(r)                                            \
+            {                                                        \
+            }                                                        \
+            operator register_type() const noexcept { return data; } \
+        };                                                           \
+    };                                                               \
     XSIMD_DECLARE_SIMD_REGISTER(T, altivec, __vector T)
 
         XSIMD_DECLARE_SIMD_BOOL_ALTIVEC_REGISTER(signed char, char);
@@ -54,7 +64,7 @@ namespace xsimd
         XSIMD_DECLARE_SIMD_BOOL_ALTIVEC_REGISTER(short, short);
         XSIMD_DECLARE_SIMD_BOOL_ALTIVEC_REGISTER(unsigned int, int);
         XSIMD_DECLARE_SIMD_BOOL_ALTIVEC_REGISTER(int, int);
-        XSIMD_DECLARE_SIMD_BOOL_ALTIVEC_REGISTER(float, float);
+        XSIMD_DECLARE_SIMD_BOOL_ALTIVEC_REGISTER(float, int);
 
 #undef XSIMD_DECLARE_SIMD_BOOL_ALTIVEC_REGISTER
     }