drivers: dma: siwx91x: DTS changes for siwx91x GPDMA driver

1. Create a YAML file for gpdma node
2. Add GPDMA node in the siwx917.dtsi

Signed-off-by: Sai Santhosh Malae <[email protected]>

Author: smalae

dts/arm/silabs/siwg917.dtsi

@@ -410,6 +410,20 @@
 			#io-channel-cells = <1>;
 			status = "disabled";
 		};
+
+		gpdma0: gpdma@21080000 {
+			compatible = "silabs,siwx91x-gpdma";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x21080000 0x1720>;
+			interrupts = <31 0>;
+			interrupt-names = "gpdma0";
+			clocks = <&clock0 SIWX91X_CLK_GPDMA0>;
+			silabs,channel-reg-base = <0x21081004>;
+			silabs,dma-channel-count = <8>;
+			#dma-cells = <2>;
+			status = "disabled";
+		};
 	};
 };
 

dts/bindings/dma/silabs,siwx91x-gpdma.yaml

@@ -0,0 +1,74 @@
+description: |
+  Silicon Labs SiWx91x General Purpose DMA (GPDMA) Controller
+
+  The SiWx91x GPDMA controller provides high-performance DMA transfers for
+  memory-to-memory, memory-to-peripheral, and peripheral-to-memory operations.
+  It supports up to 8 channels.
+
+  Usage in Device Tree Overlays:
+
+  To enable GPDMA for a peripheral (e.g., SPI), add the following to your overlay:
+
+  ```dts
+  &spi0 {
+      status = "okay";
+      cs-gpios = <&gpiob 12 GPIO_ACTIVE_LOW>;
+      pinctrl-0 = <&spi0_default>;
+      pinctrl-names = "default";
+
+      dmas = <&gpdma0 0 11>, <&gpdma0 1 10>;
+      dma-names = "tx", "rx";
+
+      slow@0 {
+          compatible = "test-spi-loopback-slow";
+          reg = <0>;
+          spi-max-frequency = <500000>;
+      };
+      fast@1 {
+          compatible = "test-spi-loopback-fast";
+          reg = <1>;
+          spi-max-frequency = <10000000>;
+      };
+  };
+
+  &gpdma0 {
+      status = "okay";
+  };
+  ```
+
+  DMA Configuration:
+  - Channel 0: Used for TX (transmit) operations
+  - Channel 1: Used for RX (receive) operations
+  - Slot 11: Peripheral slot for SPI TX
+  - Slot 10: Peripheral slot for SPI RX
+
+  The GPDMA controller automatically handles descriptor management and
+  interrupt generation for transfer completion and error conditions.
+
+compatible: "silabs,siwx91x-gpdma"
+
+include: dma-controller.yaml
+
+properties:
+  reg:
+    required: true
+
+  silabs,channel-reg-base:
+    type: int
+    const: 0x21081004
+    description: |
+        Base address for channel specific registers.
+
+  silabs,dma-channel-count:
+    type: int
+    const: 8
+    description: |
+        Base address for channel specific registers.
+
+  "#dma-cells":
+    const: 2
+
+# Parameter syntax
+dma-cells:
+  - channel
+  - slot