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I am asking for some guidelines for handling the dual-bank flash on the STM32G474rb device.
For what I understand reading the reference manual of the device, when the flash memory is less than 512 the two banks are not continuous. For this reason I am getting an error while flashing since the STLINK finds a "gap".
Info : Unable to match requested speed 2000 kHz, using 1000 kHz
Info : Unable to match requested speed 2000 kHz, using 1000 kHz
[stm32g4x.cpu] halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x080007b0 msp: 0x20001180
Info : device idcode = 0x20036469 (STM32G47/G48xx - Rev 'unknown' : 0x2003)
Info : RDP level 0 (0xAA)
Info : flash size = 128 KiB
Info : flash mode : dual-bank
Info : gap detected from 0x08010000 to 0x0803ffff
Info : Padding image section 0 at 0x080118d4 with 4 bytes
Warn : Adding extra erase range, 0x08014d00 .. 0x080407ff
Error: write into gap from 0x08010000 to 0x0803ffff
Error: error writing to flash at address 0x08000000 at offset 0x00000000
auto erase enabled
On a device with 128K Flash, there are 32 pages for each bank (2K for each page). The first bank will extend from 0x0800 0000 to 0x0800 0FFFF. The second bank extends from 0x0804 0000, so here the gap between 0x08010000 and 0x0803ffff.
Zephyr supports a dk with the stm32g474re which has 512K flash, so it does not have this issue of the gap.
How to handle the dual-bank flash in the case of < 512K flash? Should I handle it manually when describing the partitions? Are there any examples?
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Hi All!
I am asking for some guidelines for handling the dual-bank flash on the STM32G474rb device.
For what I understand reading the reference manual of the device, when the flash memory is less than 512 the two banks are not continuous. For this reason I am getting an error while flashing since the STLINK finds a "gap".
On a device with 128K Flash, there are 32 pages for each bank (2K for each page). The first bank will extend from 0x0800 0000 to 0x0800 0FFFF. The second bank extends from 0x0804 0000, so here the gap between 0x08010000 and 0x0803ffff.
Zephyr supports a dk with the stm32g474re which has 512K flash, so it does not have this issue of the gap.
How to handle the dual-bank flash in the case of < 512K flash? Should I handle it manually when describing the partitions? Are there any examples?
Thanks
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