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cbe: fix more MIPS register names in inline assembly
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+21
-10
lines changed

1 file changed

+21
-10
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src/codegen/c.zig

Lines changed: 21 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -5772,16 +5772,27 @@ fn airAsm(f: *Function, inst: Air.Inst.Index) !CValue {
57725772
assert(name.len != 0);
57735773

57745774
const target = &f.object.dg.mod.resolved_target.result;
5775-
if (target.cpu.arch.isMIPS() and name[0] == 'r') {
5776-
// GCC uses "$N" for register names instead of "rN" used by Zig.
5777-
var c_name_buf: [4]u8 = undefined;
5778-
const c_name = (&c_name_buf)[0..name.len];
5779-
@memcpy(c_name, name);
5780-
c_name_buf[0] = '$';
5781-
5782-
try w.print(" {f}", .{fmtStringLiteral(c_name, null)});
5783-
(try w.writableArray(1))[0] = ',';
5784-
continue;
5775+
if (target.cpu.arch.isMIPS()) {
5776+
if (name[0] == 'r') {
5777+
// C uses "$N" for register names instead of "rN" used by Zig.
5778+
var c_name_buf: [4]u8 = undefined;
5779+
const c_name = (&c_name_buf)[0..name.len];
5780+
@memcpy(c_name, name);
5781+
c_name_buf[0] = '$';
5782+
5783+
try w.print(" {f}", .{fmtStringLiteral(c_name, null)});
5784+
(try w.writableArray(1))[0] = ',';
5785+
continue;
5786+
} else if (mem.startsWith(u8, name, "fcc") or name[0] == 'w' or name[0] == 'f') {
5787+
// C requires a "$" prefix before register names.
5788+
var c_name_buf: [6]u8 = undefined;
5789+
c_name_buf[0] = '$';
5790+
@memcpy((&c_name_buf)[1..][0..name.len], name);
5791+
5792+
try w.print(" {f}", .{fmtStringLiteral((&c_name_buf)[0 .. 1 + name.len], null)});
5793+
(try w.writableArray(1))[0] = ',';
5794+
continue;
5795+
}
57855796
}
57865797

57875798
try w.print(" {f}", .{fmtStringLiteral(name, null)});

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