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chapter3-secureworld: correct RISC-V heading #155

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9 changes: 5 additions & 4 deletions source/chapter3-secureworld.rst
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Expand Up @@ -149,11 +149,12 @@ Generator Firmware Interface version 1.0, as defined in [TRNG]_. [#TRNGNote]_
it can be used at runtime.
The TRNG interface requires SMCCC version 1.1 or later.

RISC-V Multiprocessor Startup Protocol
======================================
RISC-V
======

The resident firmware in M mode or hypervisor running in HS mode must implement
and conform to at least SBI [RVSBISPC]_ v2.0 with at least these extensions:
The resident firmware in M mode or the hypervisor running in HS mode must
implement and conform to at least SBI [RVSBISPC]_ v2.0 with at least these
extensions:

* Base Extension
* HART State Management Extension (HSM)
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