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6 changes: 3 additions & 3 deletions amaranth_orchard/io/uart.py
Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,7 @@ def elaborate(self, platform):
]

with m.If(self.symbols.ready):
m.d.sync += self.symbols.valid.eq(0)
m.d.sync += self.symbols.valid.eq(0)

m.d.comb += [
lower.i.eq(self._port.i),
Expand Down Expand Up @@ -123,8 +123,8 @@ class UARTPeripheral(wiring.Component):
class Signature(wiring.Signature):
def __init__(self):
super().__init__({
"tx": Out(OutputIOSignature(1)),
"rx": Out(InputIOSignature(1)),
"tx": Out(OutputIOSignature(1, interface_power_domains=['default'])),
"rx": Out(InputIOSignature(1, interface_power_domains=['default'])),
})


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