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@Ravenslofty Ravenslofty commented Aug 7, 2025

What are the reasons/motivation for this change?
With the CC_MULT instantiation in nextpnr implemented, it was noticed by some testers that design area increased. For at least one design, this is because multiplication by a constant with a low number of 1 bits was mapped to a CC_MULT, so many of the multiplier columns were redundant. In this context, it seems like a reasonable idea to map variable-by-variable multiplication to CC_MULT, but let Yosys handle variable-by-constant multiplication (presumably through shift-and-add).

Explain how this is achieved.
When -noconstmult is enabled and we detect constant bits on either side, we fall back to letting Yosys handle the multiplication. This is an incredibly rough heuristic, but it's still a finer grain than all-or-nothing.

If applicable, please suggest to reviewers how they can test the change.
Compare area usage between full inference (the default), -noconstmult and -nomult on a design.

Here's 108-litex-linux with full inference:

Info: Device utilisation:
Info:               USR_RSTN:       1/      1   100%
Info:               CPE_COMP:     218/  20480     1%
Info:            CPE_CPLINES:     359/  20480     1%
Info:                   GPIO:      38/    162    23%
Info:                  CLKIN:       1/      1   100%
Info:                 GLBOUT:       1/      1   100%
Info:                    PLL:       1/      4    25%
Info:               CFG_CTRL:       0/      1     0%
Info:                    RAM:      16/     32    50%
Info:                 SERDES:       0/      1     0%
Info:                 CPE_LT:   21718/  40960    53%
Info:                 CPE_FF:    6613/  40960    16%
Info:              CPE_RAMIO:    2690/  40960     6%

with -noconstmult:

Info: Device utilisation:
Info:               USR_RSTN:       1/      1   100%
Info:               CPE_COMP:     118/  20480     0%
Info:            CPE_CPLINES:     241/  20480     1%
Info:                   GPIO:      38/    162    23%
Info:                  CLKIN:       1/      1   100%
Info:                 GLBOUT:       1/      1   100%
Info:                    PLL:       1/      4    25%
Info:               CFG_CTRL:       0/      1     0%
Info:                    RAM:      16/     32    50%
Info:                 SERDES:       0/      1     0%
Info:                 CPE_LT:   23682/  40960    57%
Info:                 CPE_FF:    6613/  40960    16%
Info:              CPE_RAMIO:    2690/  40960     6%

with -nomult

Info: Device utilisation:
Info:               USR_RSTN:       1/      1   100%
Info:               CPE_COMP:       0/  20480     0%
Info:            CPE_CPLINES:     102/  20480     0%
Info:                   GPIO:      38/    162    23%
Info:                  CLKIN:       1/      1   100%
Info:                 GLBOUT:       1/      1   100%
Info:                    PLL:       1/      4    25%
Info:               CFG_CTRL:       0/      1     0%
Info:                    RAM:      16/     32    50%
Info:                 SERDES:       0/      1     0%
Info:                 CPE_LT:   25388/  40960    61%
Info:                 CPE_FF:    6613/  40960    16%
Info:              CPE_RAMIO:    2690/  40960     6%

cc @pu-cc

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