eval_ad902x: Doc review & update

docs/solutions/reference-designs/eval-adrv902x/index.rst

@@ -1,6 +1,6 @@
 .. _adrv902x:
 
-ADRV902X
+EVAL-ADRV902X
 ===============================================================================
 
 .. image:: ../images/adrv9026.webp
@@ -64,7 +64,7 @@
 Recommendations
 -------------------------------------------------------------------------------
 
 People who follow the flow that is outlined, have a much better experience with
 things. However, like many things, documentation is never as complete as it
 should be. If you have any questions, feel free to ask on our
 :ref:`EngineerZone forums <help-and-support>`, but before that, please make
@@ -81,9 +81,9 @@
    #. :ref:`Prerequisites <adrv902x prerequisites>` - what you need to get started
    #. :ref:`Quick start guides <adrv902x quickstart>`:
 
-      #. Using the :ref:`ZCU102/Zynq UltraScale MP SoC <adrv902x quickstart zynqmp>`
-      #. Using the :ref:`VCK190/Versal <adrv902x quickstart versal>`
-
+      #. Using the :ref:`VCK190/Versal <adrv902x quickstart vck190>`
+      #. Using the :ref:`ZCU102/Zynq UltraScale+ MP SoC <adrv902x quickstart zcu102>`
+ 
    #. Configure an SD Card with :external+adi-kuiper-gen:doc:`Kuiper <index>`
 
    #. Linux Applications
@@ -112,8 +112,8 @@
            - :dokuwiki:`JESD204B Transmit Linux driver <resources/tools-software/linux-drivers/jesd204/axi_jesd204_tx>`
            - :dokuwiki:`JESD204B Receive Linux driver <resources/tools-software/linux-drivers/jesd204/axi_jesd204_rx>`
            - :dokuwiki:`JESD204B/C AXI_ADXCVR High-speed transceivers Linux driver <resources/tools-software/linux-drivers/jesd204/axi_adxcvr>`
            - :dokuwiki:`AXI ADC HDL Linux driver <resources/tools-software/linux-drivers/iio-adc/axi-adc-hdl>`
            - :dokuwiki:`AXI DAC HDL Linux driver <resources/tools-software/linux-drivers/iio-dds/axi-dac-dds-hdl>`
            - :dokuwiki:`AD9528 Low Jitter Clock Generator Linux driver <resources/tools-software/linux-drivers/iio-pll/ad9528>`
            - :dokuwiki:`AXI-DMAC DMA Controller Linux driver <resources/tools-software/linux-drivers/axi-dmac>`
            - :dokuwiki:`ADRV9026/ADRV9029 Linux device driver <resources/tools-software/linux-drivers/iio-transceiver/adrv9025>`
@@ -160,9 +160,9 @@
 Radio:
 
 #. :adi:`Part 1 - The Analog Devices/Xilinx SDR Rapid Prototyping Platform: Its Capabilities, Benefits, and Tools <library/analogDialogue/archives/49-09/four-step-sdr-01.html>`
 #. :adi:`Part 2 - Mode S Detection and Decoding Using MATLAB and Simulink <library/analogDialogue/archives/49-10/four-step-sdr-02.html>`
 #. :adi:`Part 3 - Mode S Signals Decoding Algorithm Validation Using Hardware in the Loop <library/analogDialogue/archives/49-11/four-step-sdr-03.html>`
 #. :adi:`Part 4 - Rapid Prototyping Using the Zynq SDR Kit and Simulink Code Generation Workflow <library/analogDialogue/archives/49-12/four-step-sdr-04.html>`
 
 About JESD standard:
 
@@ -174,7 +174,7 @@
 -------------------------------------------------------------------------------
 
 #. :mw:`Modelling and Simulating Analog Devices' RF Transceivers with MATLAB and SimRF <videos/modelling-and-simulating-analog-devices-rf-transceivers-with-matlab-and-simrf-89934.html>`
 #. :mw:`Getting Started with Software-Defined Radio using MATLAB and Simulink <videos/getting-started-with-software-defined-radio-using-matlab-and-simulink-108646.html>`
 
 Additional information
 -------------------------------------------------------------------------------
@@ -190,7 +190,7 @@
   - :dokuwiki:`Typical High Level DPD development flow with the ADRV9029 transceiver <resources/eval/user-guides/adrv9029/dpd_development_flow>`
 
 - :dokuwiki:`ADRV9029 DPD Prerequisites <resources/eval/user-guides/adrv9029/prerequisites>`
 - `Unboxing ADRV902x Transceiver Eval Platform - Video <https://www.youtube.com/watch?v=Oq_9bl5f8fM>`__
 - :dokuwiki:`Evaluating ADRV9029 through TES GUI <resources/eval/user-guides/adrv9029/evaluation_through_tes_gui>`
 - :dokuwiki:`Evaluating ADRV9029 DPD through TES GUI <resources/eval/user-guides/adrv9029/evaluating_dpd_through_tes_gui>`
 - :dokuwiki:`ADRV9029 DPD Error Troubleshooting <resources/eval/user-guides/adrv9029/dpd_error_troubleshooting>`

docs/solutions/reference-designs/eval-adrv902x/quickstart/index.rst

@@ -6,12 +6,12 @@
 The Quick start guides provide simple step by step instructions on how to do
 an initial system setup for the :adi:`EVAL-ADRV9026/ADRV9029 <EVAL-ADRV9026>`
 boards on various FPGA development boards. In these guides, we will discuss how
 to program the bitstream, run a no-OS program or boot a Linux distribution.
 
 .. toctree::
 
-   On VCK190 <versal>
-   On ZCU102 <zynqmp>
+   On VCK190 <vck190>
+   On ZCU102 <zcu102>
 
 .. _adrv902x carriers:
 
@@ -21,7 +21,7 @@
 The :adi:`EVAL-ADRV9026/ADRV9029 <EVAL-ADRV9026>`, is, by definition a "FPGA
 mezzanine card" (FMC); that means it needs a carrier to plug into.
 
 The carriers we support are listed below, as well as the FMC port where to
 connect the evaluation board:
 
 .. list-table::
@@ -54,7 +54,7 @@
    - - FPGA board
      - HDL
      - Linux software
      - No-OS software
    - - :intel:`Arria 10 SoC <content/www/us/en/products/details/fpga/arria/10.html>`
      - Yes
      - Yes
@@ -78,29 +78,29 @@
 On most carriers, the :adi:`EVAL-ADRV9026/ADRV9029 <EVAL-ADRV9026>` boards
 connects to the HPC1 connector (unless otherwise noted). The carrier setup
 requires power, UART (115200), Ethernet (Linux), HDMI (if available) and/or
 JTAG (no-OS) connections. A few typical setups are shown below.
 
-ZCU102 + EVAL-ADRV9026/ADRV9029
+A10SoC + EVAL-ADRV9026/ADRV9029
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-.. image:: ../../images/adrv9026_zcu102_setup.jpg
-   :width: 800
+TO BE ADDED
 
 VCK190 + EVAL-ADRV9026/ADRV9029
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
 .. image:: ../../images/adrv9026_vck190_setup.jpg
    :width: 800
 
-A10SoC + EVAL-ADRV9026/ADRV9029
+VCU118 + EVAL-ADRV9026/ADRV9029
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
 TO BE ADDED
 
-VCU118 + EVAL-ADRV9026/ADRV9029
+ZCU102 + EVAL-ADRV9026/ADRV9029
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-TO BE ADDED
+.. image:: ../../images/adrv9026_zcu102_setup.jpg
+   :width: 800
 
 Unboxing guide
 -------------------------------------------------------------------------------

docs/solutions/reference-designs/eval-adrv902x/quickstart/versal.rst → docs/solutions/reference-designs/eval-adrv902x/quickstart/vck190.rst

@@ -1,4 +1,4 @@
-.. _adrv902x quickstart versal:
+.. _adrv902x quickstart vck190:
 
 VCK190 Quick start
 ===============================================================================
@@ -17,21 +17,21 @@
 Necessary files
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
 The following files are needed for the system to boot:
 
 - HDL boot image: ``BOOT.BIN``
 - Linux Kernel image: ``Image``
 - Linux device tree: ``system.dtb``
 - ``boot.scr``
 - System controller image (to be put on the System Controller SD card):
   :xilinx:`Image <member/forms/download/design-license-xef.html?filename=sc2.2_01.img.zip>`
 
 They can either be taken from the SD card -- already generated by us, or you
 can build them manually.
 
 In the following sections, we explain **how to take them from the SD card**.
 
 Instructions on how to manually build the boot files from source can be found
 here:
 
 - :ref:`linux-kernel zynqmp` (the only difference compared to the ZynqMP is
@@ -46,7 +46,7 @@
 - SD Card 16GB imaged with :external+adi-kuiper-gen:doc:`Kuiper <index>`
 - **Since the Versal support is not part of the latest release**, you must update
   the BOOT partition of the SD card with the latest built files from main
   branches. They can be downloaded from here:
   :download:`boot files <adrv9026_vck190_boot.tar.gz>`
 - An UART terminal (Putty/Tera Term/Minicom, etc.) with baud rate 115200 (8N1)
 - SD card imaged with the System Controller image:
@@ -78,46 +78,46 @@
 
 Follow the steps in this order, to avoid damaging the components:
 
-- Connect the :adi:`EVAL-ADRV9026/ADRV9029 <EVAL-ADRV9026>` FMC board to the
-  FPGA carrier FMC+ FMCP1 socket
-- Connect USB UART J207 (Type-C USB) to your host PC
-- Insert SD card with ADI Kuiper image into socket J302
-- Insert System Controller SD card into socket J206
-- Configure ACAP for SD boot (mode SW1[4:1] switch in the position
-  **OFF,OFF,OFF,ON** as seen in the below picture)
+#. Connect the :adi:`EVAL-ADRV9026/ADRV9029 <EVAL-ADRV9026>` FMC board to the
+   FPGA carrier FMC+ FMCP1 socket
+#. Connect USB UART J207 (Type-C USB) to your host PC
+#. Insert SD card with ADI Kuiper image into socket J302
+#. Insert System Controller SD card into socket J206
+#. Configure ACAP for SD boot (mode SW1[4:1] switch in the position
+   **OFF,OFF,OFF,ON** as seen in the below picture)
 
-.. image:: ../../images/vck190_sw1.jpg
-   :width: 200
+   .. image:: ../../images/vck190_sw1.jpg
+      :width: 200
 
-- Configure System Controller for SD card boot (mode SW11[4:1] switch in the
+#. Configure System Controller for SD card boot (mode SW11[4:1] switch in the
    position **OFF,OFF,OFF,ON** as seen in the below picture).
 
-.. image:: ../../images/vck190_sw11.jpg
-   :width: 200
+   .. image:: ../../images/vck190_sw11.jpg
+      :width: 200
 
-- Connect an Ethernet cable to J307 and also to SYSCTL Ethernet port to access
-  Board Evaluation & Management Tool (BEAM);
-- Turn on the power switch on the FPGA board;
-- Observe kernel and serial console messages on your terminal, both the ACAP
-  UART interface and the System controller. (use the first ttyUSB or COM port
-  registered for the ACAP UART interface, and try  the other 2 to find the one
-  for System Controller);
-- On the System Controller console, a BEAM Tool Web Address should be assigned.
-  Go to this web address to set VADJ_FMC to 1.5V;
-- To change VADJ_FMC On BEAM, click 'Test The Board'>'Board Settings'>'FMC'.
-  Then on 'Set VADJ_FMC', select 1.5V and click 'Set'.
+#. Connect an Ethernet cable to J307 and also to SYSCTL Ethernet port to access
+   Board Evaluation & Management Tool (BEAM);
+#. Turn on the power switch on the FPGA board;
+#. Observe kernel and serial console messages on your terminal, both the ACAP
+   UART interface and the System controller. (use the first ttyUSB or COM port
+   registered for the ACAP UART interface, and try  the other 2 to find the one
+   for System Controller);
+#. On the System Controller console, a BEAM Tool Web Address should be assigned.
+   Go to this web address to set VADJ_FMC to 1.5V;
+#. To change VADJ_FMC On BEAM, click 'Test The Board'>'Board Settings'>'FMC'.
+   Then on 'Set VADJ_FMC', select 1.5V and click 'Set'.
 
-.. image:: beam-home.jpg
-   :width: 1000
+   .. image:: beam-home.jpg
+      :width: 1000
 
-.. image:: beam-board-settings.jpg
-   :width: 1000
+   .. image:: beam-board-settings.jpg
+      :width: 1000
 
-.. image:: beam-set-vadj.jpg
-   :width: 1000
+   .. image:: beam-set-vadj.jpg
+      :width: 1000
 
-- On the ACAP UART interface console, reboot the system. After reboot,
-  adrv9026 devices should be present.
+#. On the ACAP UART interface console, reboot the system. After reboot,
+   ADRV9026 devices should be present.
 
 .. note::
 
@@ -895,10 +895,6 @@
 About the IIO devices
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-..
-   This section is with ^^^ because the last section from using-iio-osc.rst which
-   is included previously, has the last section as ^^^.
-
 Main receivers RX1, RX2, RX3, and RX4 are handled by the axi-adrv9025-rx-hpc IIO device.
 
 Channels:

docs/solutions/reference-designs/eval-adrv902x/quickstart/zynqmp.rst → docs/solutions/reference-designs/eval-adrv902x/quickstart/zcu102.rst

@@ -1,10 +1,12 @@
-.. _adrv902x quickstart zynqmp:
+.. _adrv902x quickstart zcu102:
 
 ZCU102 Quick start
 ===============================================================================
 
-.. image:: ../../images/adrv9026_zcu102_setup.jpg
-   :width: 800
+.. image:: ../../images/zcu102.jpg
+   :width: 900
+
+.. esd-warning::
 
 This guide provides quick instructions on how to setup the
 :adi:`EVAL-ADRV9026/ADRV9029 <EVAL-ADRV9026>` on:
@@ -61,29 +63,28 @@ Testing
 Creating the setup
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-.. image:: ../../images/zcu102.jpg
-   :width: 900
-
-.. esd-warning::
+.. image:: ../../images/adrv9026_zcu102_setup.jpg
+   :width: 800
 
 Follow the steps in this order, to avoid damaging the components:
 
 #. Connect the :adi:`EVAL-ADRV9026/ADRV9029 <EVAL-ADRV9026>` FMC board to the
-   FPGA carrier **HPC1** FMC1 socket
+   ZCU102 **HPC1** FMC1 socket
 #. Insert SD card into the SD card socket on the FPGA
 #. Configure :xilinx:`ZCU102` for SD card boot mode (mode SW6[4:1] switch in
    the position **OFF,OFF,OFF,ON** as seen in the below picture)
+
+   .. image:: ../../images/zcu102_1p0_bootmode.jpg
+      :width: 400
+
 #. Plug-in an Ethernet cable from your router/switch to the Ethernet port on
    the FPGA board
-#. Connect USB UART J83 (Micro USB) to your host PC
+#. Connect USB UART J83 (Micro-USB) to your host PC
 #. (Optional) Connect a monitor to the FPGA by HDMI, and a mouse and a keyboard
 #. Turn on the power switch on the FPGA board
 #. Observe Kernel and serial console output messages on your terminal (use
    the first ttyUSB or COM port registered)
 
-.. image:: ../../images/zcu102_1p0_bootmode.jpg
-   :width: 400
-
 Boot messages
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
@@ -1009,17 +1010,14 @@ To reboot the system, run:
    be taken not to corrupt the file system -- please shut down things, don't
    just turn off the power switch. Depending on your monitor, the standard
    power off could be hiding. You can do this from the terminal as well with
-   :code:`sudo shutdown -h now` or the above-mentioned command for powering off.
+   :code:`sudo shutdown -h now` or the above-mentioned command for powering
+   off.
 
 .. include:: ../../common/using-iio-osc.rst
 
 About the IIO devices
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-..
-   This section is with ^^^ because the last section from using-iio-osc.rst which
-   is included previously, has the last section as ^^^.
-
 Main receivers RX1, RX2, RX3, and RX4 are handled by the axi-adrv9025-rx-hpc IIO device.
 
 Channels:
@@ -1075,19 +1073,17 @@ Testing
 Creating the setup
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-.. image:: ../../images/zcu102.jpg
-   :width: 900
-
-.. esd-warning::
+.. image:: ../../images/adrv9026_zcu102_setup.jpg
+   :width: 800
 
 Follow the steps in this order, to avoid damaging the components:
 
 #. Connect the :adi:`EVAL-ADRV9026/ADRV9029 <EVAL-ADRV9026>` FMC board to the
-   FPGA carrier **HPC1** FMC1 socket
+   ZCU102 **HPC1** FMC1 socket
 #. Configure :xilinx:`ZCU102` for JTAG boot mode (mode SW6[4:1] switch in
    the position **ON,ON,ON,ON**)
-#. Connect USB UART J83 (Micro USB) to your host PC
-#. Connecy USB JTAG (Micro USB) to your host PC
+#. Connect USB UART J83 (Micro-USB) to your host PC
+#. Connect USB JTAG (Micro-USB) to your host PC
 #. (Optional) Connect a monitor to the FPGA by HDMI, and a mouse and a keyboard
 #. Turn on the power switch on the FPGA board
 #. Observe console output messages on your terminal (use the first ttyUSB or
@@ -1104,3 +1100,6 @@ connected to the proper ttyUSB or COM port:
    ::
 
       Xilinx Zynq MP First Stage Boot Loader
+
+..
+    TBD