Max22007 dev

Documentation/ABI/testing/sysfs-bus-iio-dac-max22007

@@ -0,0 +1,33 @@
+What:		/sys/bus/iio/devices/iio:deviceX/out_voltageY_ldac_update
+KernelVersion:	6.13
+Contact:	[email protected]
+Description:
+		Trigger LDAC (Load DAC) update for the specified channel. Write 1 to update DAC outputs.
+
+What:		/sys/bus/iio/devices/iio:deviceX/out_currentY_ldac_update
+KernelVersion:	6.13
+Contact:	[email protected]
+Description:
+		Trigger LDAC (Load DAC) update for the specified channel.
+		Writing 1 will transfer the DAC register value to the actual
+		DAC output, effectively updating the analog output current.
+		Writing 0 has no effect. This is useful when using the
+		transparent latch mode is disabled, allowing manual control
+		over when DAC register changes take effect on the output.
+
+What:		/sys/bus/iio/devices/iio:deviceX/out_voltageY_powermode
+What:		/sys/bus/iio/devices/iio:deviceX/out_currentY_powermode
+KernelVersion:	6.13
+Contact:	[email protected]
+Description:
+		Control the power state of the specified channel. Write "on" to
+		enable the channel output, or "off" to disable it. Reading
+		returns the current power state.
+
+What:		/sys/bus/iio/devices/iio:deviceX/out_voltageY_powermode_available
+What:		/sys/bus/iio/devices/iio:deviceX/out_currentY_powermode_available
+KernelVersion:	6.13
+Contact:	[email protected]
+Description:
+		Shows the available power modes for the channel. Always returns
+		"on off".

Documentation/devicetree/bindings/iio/dac/adi,max22007.yaml

@@ -0,0 +1,134 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/dac/adi,max22007.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices MAX22007 DAC device driver
+
+maintainers:
+  - Janani Sunil <[email protected]>
+
+description:
+  The MAX22007 is a quad-channel, 12-bit digital-to-analog converter (DAC)
+  with integrated precision output amplifiers and current output capability.
+  Each channel can be independently configured for voltage or current output.
+  The driver supports runtime LDAC (Latch DAC) control via per-channel sysfs
+  attributes for precise output timing control.
+  Datasheet available at https://www.analog.com/en/products/max22007.html
+
+properties:
+  compatible:
+    const: adi,max22007
+
+  reg:
+    maxItems: 1
+
+  spi-max-frequency:
+    maximum: 500000
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 0
+
+  vdd-supply:
+    description: Low-Voltage Power Supply from +2.7V to +5.5V.
+
+  hvdd-supply:
+    description:
+      Positive High-Voltage Power Supply from +8V to (HVSS +24V) for
+      the Output Channels.
+
+  hvss-supply:
+    description:
+      Negative High-Voltage Power Supply from -2V to 0V for the Output Channels.
+
+  adi,crc-disable:
+    type: boolean
+    description:
+      Disable CRC8 error checking for SPI communications. By default, CRC8 is
+      enabled for data integrity verification. Set this property to disable it.
+
+  reset-gpios:
+    maxItems: 1
+    description:
+      GPIO used for hardware reset of the device. If not specified, the driver
+      will use software reset via SPI register.
+
+patternProperties:
+  "^channel@[0-3]$":
+    type: object
+    description:
+      Represents the external channels which are connected to the DAC.
+      Channels not specified in the device tree will be powered off.
+    properties:
+      reg:
+        description:
+          This represents the channel number.
+        maximum: 3
+
+      adi,dac-latch-mode:
+        description:
+          DAC latch control mode for the channel.
+        $ref: /schemas/types.yaml#/definitions/string
+        enum: [ldac-control, transparent]
+        default: ldac-control
+
+      adi,mode:
+        description:
+          Output mode for the channel.
+        $ref: /schemas/types.yaml#/definitions/string
+        enum: [voltage, current]
+        default: voltage
+
+    required:
+      - reg
+
+    additionalProperties: false
+
+required:
+  - compatible
+  - reg
+
+anyOf:
+  - required: [channel@0]
+  - required: [channel@1]
+  - required: [channel@2]
+  - required: [channel@3]
+
+allOf:
+  - $ref: /schemas/spi/spi-peripheral-props.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+    spi {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        dac@0 {
+            compatible = "adi,max22007";
+            reg = <0>;
+            spi-max-frequency = <500000>;
+            reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            channel@0 {
+                reg = <0>;
+                adi,mode = "voltage";
+                adi,dac-latch-mode = "ldac-control";
+            };
+
+            channel@1 {
+                reg = <1>;
+                adi,mode = "current";
+                adi,dac-latch-mode = "transparent";
+            };
+        };
+    };
+...

Documentation/iio/index.rst

@@ -31,3 +31,4 @@ Industrial I/O Kernel Drivers
    adxl380
    bno055
    ep93xx_adc
+   max22007

Documentation/iio/max22007.rst

@@ -0,0 +1,192 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+
+===============
+MAX22007 driver
+===============
+
+Device driver for Analog Devices Inc. MAX22007 quad-channel industrial DAC.
+The module name is ``max22007``.
+
+Supported devices
+=================
+
+* `MAX22007 <https://www.analog.com/en/products/max22007.html>`_
+
+Wiring connections
+==================
+
+The MAX22007 uses a standard SPI interface.
+
+Device Tree Configuration
+=========================
+
+The device supports both global and per-channel configuration through device tree.
+
+Global Properties:
+* ``adi,crc-disable``: Disable CRC8 error checking for SPI communications (optional, CRC enabled by default)
+* ``reset-gpios``: GPIO pin for hardware reset (optional, falls back to software reset if not specified)
+* ``vdd-supply``: Low-Voltage Power Supply from +2.7V to +5.5V (optional)
+* ``hvdd-supply``: Positive High-Voltage Power Supply from +8V to (HVSS +24V) for the Output Channels (optional)
+* ``hvss-supply``: Negative High-Voltage Power Supply from -2V to 0V for the Output Channels (optional)
+
+Per-channel properties:
+* ``adi,dac-latch-mode``: Controls when DAC updates occur
+  - "ldac-control": LDAC pin controls the latch (default)
+  - "transparent": Transparent latch mode (immediate update)
+
+* ``adi,mode``: Sets the output mode
+  - "voltage": Voltage output mode (default)
+  - "current": Current output mode
+
+Device attributes
+=================
+
+The MAX22007 driver provides IIO DAC interfaces that vary based on the
+configured channel mode. Each channel appears as a separate IIO device
+attribute:
+
+* ``out_voltage_raw`` (voltage mode channels)
+* ``out_current_raw`` (current mode channels)
+* ``out_voltage_scale`` / ``out_current_scale`` (channel scaling factors)
+* ``out_voltage_powermode`` / ``out_current_powermode`` (channel power control)
+* ``out_voltage_powermode_available`` / ``out_current_powermode_available`` (available power modes)
+* ``ldac_update`` (per-channel LDAC latch control)
+
+The driver automatically configures the IIO channel type based on the configured
+channel mode from device tree.
+
+LDAC Update Control
+===================
+
+Each channel provides an ``ldac_update`` attribute for runtime LDAC (Latch DAC)
+control. This allows precise timing control of when DAC register values are
+transferred to the output:
+
+* Write ``1`` to trigger an immediate LDAC update for that specific channel
+* Write ``0`` for no operation (returns immediately)
+
+This provides fine-grained control over output timing, which is essential for
+applications requiring synchronized DAC updates.
+
+Power Mode Control
+==================
+
+Each channel provides ``powermode`` attributes for runtime power control:
+
+* Write ``"on"`` to enable the channel output
+* Write ``"off"`` to disable the channel output
+* Read the attribute to get the current power state
+* Read ``powermode_available`` to see available power modes (always ``"off on"``)
+
+This allows individual channels to be powered on/off independently for power
+management and safety purposes.
+
+Usage Examples
+==============
+
+Setting DAC output value and triggering LDAC update:
+
+.. code-block:: bash
+
+    # Set channel 0 (voltage mode) to raw value 655 (≈2V)
+    echo 655 > /sys/bus/iio/devices/iio:deviceX/out_voltage0_raw
+
+    # Trigger LDAC update to apply the new value
+    echo 1 > /sys/bus/iio/devices/iio:deviceX/out_voltage0_ldac_update
+
+    # Set channel 1 (current mode) and update
+    echo 1024 > /sys/bus/iio/devices/iio:deviceX/out_current1_raw
+    echo 1 > /sys/bus/iio/devices/iio:deviceX/out_current1_ldac_update
+
+Controlling channel power modes:
+
+.. code-block:: bash
+
+    # Enable channel 0
+    echo on > /sys/bus/iio/devices/iio:deviceX/out_voltage0_powermode
+
+    # Disable channel 1
+    echo off > /sys/bus/iio/devices/iio:deviceX/out_current1_powermode
+
+    # Check current power state
+    cat /sys/bus/iio/devices/iio:deviceX/out_voltage0_powermode
+
+    # Check available power modes
+    cat /sys/bus/iio/devices/iio:deviceX/out_voltage0_powermode_available
+
+Reading channel values and scale factors:
+
+.. code-block:: bash
+
+    # Read raw DAC value
+    cat /sys/bus/iio/devices/iio:deviceX/out_voltage0_raw
+
+    # Read scale factor (volts per LSB)
+    cat /sys/bus/iio/devices/iio:deviceX/out_voltage0_scale
+
+Check available channels:
+
+.. code-block:: bash
+
+    ls /sys/bus/iio/devices/iio:deviceX/out_*_raw
+
+Scale Calculations
+==================
+
+The driver provides accurate scale factors based on the hardware configuration:
+
+**Voltage Mode:**
+  - Scale = (5 × 2.5V) / 4096 = 0.003051757 V per LSB
+  - Range: 0V to 12.5V over 12-bit (0-4095)
+  - Formula: Output = Raw_Value × Scale
+
+**Current Mode:**
+  - Scale = (2.5V / (2 × 50Ω)) / 4096 = 0.000006103515625 A per LSB
+  - Range: 0A to 0.025A over 12-bit (0-4095)
+  - Formula: Output = Raw_Value × Scale
+
+Register Map
+------------
+
+The MAX22007 uses the following register mapping:
+
+.. list-table::
+   :header-rows: 1
+
+   * - Address
+     - Register Name
+     - Description
+   * - 0x03
+     - CONFIG_REG
+     - Configuration register (CRC enable, DAC latch modes)
+   * - 0x04
+     - CONTROL_REG
+     - LDAC control register for runtime updates
+   * - 0x05
+     - CHANNEL_MODE_REG
+     - Channel mode and power control
+   * - 0x06
+     - SOFT_RESET_REG
+     - Software reset control
+   * - 0x07-0x0A
+     - DAC_CHANNEL_REG(0-3)
+     - DAC data registers for channels 0-3
+
+
+Driver Architecture
+===================
+
+The driver implements the following key features:
+
+* **CRC8 Error Checking**: All SPI communications use CRC8 for data integrity
+* **Channel Configuration**: Supports per-channel mode and power configuration
+* **Register Map**: Uses regmap for efficient register access and caching
+* **IIO Integration**: Full integration with the Linux IIO subsystem
+
+Not Implemented
+===============
+
+* Channel configuration (voltage/current mode) is set at device tree parsing
+  and cannot be changed dynamically
+* The driver requires proper device tree configuration for optimal operation
+* Simultaneous multi-channel LDAC updates (only single-channel updates supported)

arch/arm/boot/dts/overlays/Makefile

@@ -322,6 +322,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
 	rpi-ltc6952.dtbo \
 	rpi-max14830-i2c.dtbo \
 	rpi-max14830-spi.dtbo \
+	rpi-max22007.dtbo \
 	rpi-max31335.dtbo \
 	rpi-poe.dtbo \
 	rpi-poe-plus.dtbo \