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Verilog: test for truncation to one bit #1249

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Merged
merged 1 commit into from
Aug 28, 2025
Merged

Verilog: test for truncation to one bit #1249

merged 1 commit into from
Aug 28, 2025

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kroening
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This extends an existing test to cover the case of truncating to one bit in an assignment.

@kroening
Verilog: test for truncation to one bit
c517ff1 
This extends an existing test to cover the case of truncating to one bit in
an assignment.
@kroening kroening marked this pull request as ready for review August 28, 2025 17:40
@tautschnig tautschnig merged commit 7fd84cc into main Aug 28, 2025
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@tautschnig tautschnig deleted the extension-and-truncation1-bit branch August 28, 2025 20:05
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@tautschnig tautschnig tautschnig approved these changes

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