Verilog: split variable and function/task declaration classes #1262
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The classes used by the parser for variable and function/task declarations only share a single field (the type), which is inherited from exprt. Hence, this splits the verilog_declt class up by extracting the fields used by function/task declarations into a separate, new class.
kroening
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tautschnig
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Sep 13, 2025
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The classes used by the parser for variable and function/task declarations only share a single field (the type), which is inherited from
exprt.Hence, this splits the
verilog_decltclass up by extracting the fields used by function/task declarations into a separate, new class.