[SYCLLowerIR] Fix a hierarchical parallelism bug

[lbushi25]

There is a bug in my earlier PR #20484. When encountering an indirect call to a parallel_for_work_item function, the range of instructions that will be subjected to the lowering pass must be closed, whereas the current code simply skips over this instruction as its iterating the instructions of the basic block which effectively keeps extending the range. There is an E2E test that reflects this bug where it used to hang before this fix but so far I'm not aware of an LLVM-IR snippet of code that triggers it so for the moment, I'm just adding a SYCL-level test.

[maksimsab]

Is it possible to extract LLVM snippet from the E2E test? Bypassing LIT test modification significantly complicates later upstreaming.

[lbushi25]

Is it possible to extract LLVM snippet from the E2E test? Bypassing LIT test modification significantly complicates later upstreaming.

I haven't been able to find an LLVM snipper to trigger this. This resulted from an high level client test failure whereas all the LLVM IR was passing. I think for now let's go ahead with the merge and I'll keep looking into it.

Aside from this, there is a test already verifying this pass's output in pfwg_and_pfwii.ll but as I said it doesn't seem to capture this bug.

[github-actions]

@intel/llvm-gatekeepers please consider merging

[github-actions]

@intel/llvm-gatekeepers please consider merging

[lbushi25]

@maksimsab Please have a look at my comment above. Can we go ahead with the merge here?

[github-actions]

@intel/llvm-gatekeepers please consider merging

[maksimsab]

Aside from this, there is a test already verifying this pass's output in pfwg_and_pfwii.ll but as I said it doesn't seem to capture this bug.

Why do we need this change in test if it doesn't capture the bug?

[lbushi25]

The latest outstanding comment was settled offline, hence the subsequent approval.
@intel/llvm-gatekeepers Can we merge this please?