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[CIR] Skip generation of a continue block when flattening TernaryOp #142165

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[CIR] Skip generation of a continue block when flattening TernaryOp #142165

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f62994d
[CIR] Skip generation of a continue block when flattening TernaryOp
mmha May 30, 2025
355eea7
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mmha May 30, 2025
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29 changes: 14 additions & 15 deletions clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -16,9 +16,11 @@
#include "mlir/IR/Block.h"
#include "mlir/IR/Builders.h"
#include "mlir/IR/PatternMatch.h"
#include "mlir/IR/ValueRange.h"
#include "mlir/Support/LogicalResult.h"
#include "mlir/Transforms/DialectConversion.h"
#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
#include "clang/AST/DeclBase.h"
#include "clang/CIR/Dialect/IR/CIRDialect.h"
#include "clang/CIR/Dialect/Passes.h"
#include "clang/CIR/MissingFeatures.h"
Expand Down Expand Up @@ -492,14 +494,6 @@ class CIRTernaryOpFlattening : public mlir::OpRewritePattern<cir::TernaryOp> {
Block *condBlock = rewriter.getInsertionBlock();
Block::iterator opPosition = rewriter.getInsertionPoint();
Block *remainingOpsBlock = rewriter.splitBlock(condBlock, opPosition);
llvm::SmallVector<mlir::Location, 2> locs;
// Ternary result is optional, make sure to populate the location only
// when relevant.
if (op->getResultTypes().size())
locs.push_back(loc);
Block *continueBlock =
rewriter.createBlock(remainingOpsBlock, op->getResultTypes(), locs);
rewriter.create<cir::BrOp>(loc, remainingOpsBlock);

Region &trueRegion = op.getTrueRegion();
Block *trueBlock = &trueRegion.front();
Expand All @@ -508,24 +502,29 @@ class CIRTernaryOpFlattening : public mlir::OpRewritePattern<cir::TernaryOp> {
auto trueYieldOp = dyn_cast<cir::YieldOp>(trueTerminator);

rewriter.replaceOpWithNewOp<cir::BrOp>(trueYieldOp, trueYieldOp.getArgs(),
continueBlock);
rewriter.inlineRegionBefore(trueRegion, continueBlock);
remainingOpsBlock);
rewriter.inlineRegionBefore(trueRegion, remainingOpsBlock);

Block *falseBlock = continueBlock;
Region &falseRegion = op.getFalseRegion();
Block *falseBlock = &falseRegion.front();

falseBlock = &falseRegion.front();
mlir::Operation *falseTerminator = falseRegion.back().getTerminator();
rewriter.setInsertionPointToEnd(&falseRegion.back());
auto falseYieldOp = dyn_cast<cir::YieldOp>(falseTerminator);
rewriter.replaceOpWithNewOp<cir::BrOp>(falseYieldOp, falseYieldOp.getArgs(),
continueBlock);
rewriter.inlineRegionBefore(falseRegion, continueBlock);
remainingOpsBlock);
rewriter.inlineRegionBefore(falseRegion, remainingOpsBlock);

rewriter.setInsertionPointToEnd(condBlock);
rewriter.create<cir::BrCondOp>(loc, op.getCond(), trueBlock, falseBlock);

rewriter.replaceOp(op, continueBlock->getArguments());
if (ValueTypeRange<ResultRange> rt = op.getResultTypes(); rt.size()) {
iterator_range args = remainingOpsBlock->addArguments(rt, op.getLoc());
SmallVector<mlir::Value, 2> values;
llvm::copy(args, std::back_inserter(values));
rewriter.replaceOpUsesWithinBlock(op, values, remainingOpsBlock);
}
rewriter.eraseOp(op);

// Ok, we're done!
return mlir::success();
Expand Down
2 changes: 0 additions & 2 deletions clang/test/CIR/Lowering/ternary.cir
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Expand Up @@ -25,6 +25,4 @@ module {
// LLVM: br label %[[M]]
// LLVM: [[M]]:
// LLVM: [[R:%[[:alnum:]]+]] = phi i32 [ 1, %[[B2]] ], [ 0, %[[B1]] ]
// LLVM: br label %[[B3:[[:alnum:]]+]]
// LLVM: [[B3]]:
// LLVM: ret i32 [[R]]
4 changes: 0 additions & 4 deletions clang/test/CIR/Transforms/ternary.cir
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Expand Up @@ -37,8 +37,6 @@ module {
// CHECK: %6 = cir.const #cir.int<5> : !s32i
// CHECK: cir.br ^bb3(%6 : !s32i)
// CHECK: ^bb3(%7: !s32i): // 2 preds: ^bb1, ^bb2
// CHECK: cir.br ^bb4
// CHECK: ^bb4: // pred: ^bb3
// CHECK: cir.store %7, %1 : !s32i, !cir.ptr<!s32i>
// CHECK: %8 = cir.load %1 : !cir.ptr<!s32i>, !s32i
// CHECK: cir.return %8 : !s32i
Expand All @@ -60,8 +58,6 @@ module {
// CHECK: ^bb2: // pred: ^bb0
// CHECK: cir.br ^bb3
// CHECK: ^bb3: // 2 preds: ^bb1, ^bb2
// CHECK: cir.br ^bb4
// CHECK: ^bb4: // pred: ^bb3
// CHECK: cir.return
// CHECK: }

Expand Down