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[mlir][amdgpu] Add rocdl.s.waitcnt
wrapper
#149670
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Original file line number | Diff line number | Diff line change |
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@@ -419,6 +419,112 @@ struct RawBufferOpLowering : public ConvertOpToLLVMPattern<GpuOp> { | |
} | ||
}; | ||
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// TODO: AMDGPU backend already have all this bitpacking logic, we should move | ||
// it to some common place. | ||
/// Vmcnt, Expcnt and Lgkmcnt are decoded as follows: | ||
/// Vmcnt = Waitcnt[3:0] (pre-gfx9) | ||
/// Vmcnt = Waitcnt[15:14,3:0] (gfx9,10) | ||
/// Vmcnt = Waitcnt[15:10] (gfx11) | ||
/// Expcnt = Waitcnt[6:4] (pre-gfx11) | ||
/// Expcnt = Waitcnt[2:0] (gfx11) | ||
/// Lgkmcnt = Waitcnt[11:8] (pre-gfx10) | ||
/// Lgkmcnt = Waitcnt[13:8] (gfx10) | ||
/// Lgkmcnt = Waitcnt[9:4] (gfx11) | ||
static FailureOr<unsigned> encodeWaitcnt(Chipset chipset, unsigned vmcnt, | ||
unsigned expcnt, unsigned lgkmcnt) { | ||
if (chipset.majorVersion < 9) { | ||
vmcnt = std::min(15u, vmcnt); | ||
expcnt = std::min(7u, expcnt); | ||
lgkmcnt = std::min(15u, lgkmcnt); | ||
return vmcnt | (expcnt << 4) | (lgkmcnt << 8); | ||
} | ||
if (chipset.majorVersion == 9) { | ||
vmcnt = std::min(63u, vmcnt); | ||
expcnt = std::min(7u, expcnt); | ||
lgkmcnt = std::min(15u, lgkmcnt); | ||
unsigned lowBits = vmcnt & 0xF; | ||
unsigned highBits = (vmcnt >> 4) << 14; | ||
unsigned otherCnts = (expcnt << 4) | (lgkmcnt << 8); | ||
return lowBits | highBits | otherCnts; | ||
} | ||
if (chipset.majorVersion == 10) { | ||
vmcnt = std::min(63u, vmcnt); | ||
expcnt = std::min(7u, expcnt); | ||
lgkmcnt = std::min(63u, lgkmcnt); | ||
unsigned lowBits = vmcnt & 0xF; | ||
unsigned highBits = (vmcnt >> 4) << 14; | ||
unsigned otherCnts = (expcnt << 4) | (lgkmcnt << 8); | ||
return lowBits | highBits | otherCnts; | ||
} | ||
if (chipset.majorVersion == 11) { | ||
vmcnt = std::min(63u, vmcnt); | ||
expcnt = std::min(7u, expcnt); | ||
lgkmcnt = std::min(63u, lgkmcnt); | ||
return (vmcnt << 10) | expcnt | (lgkmcnt << 4); | ||
} | ||
return failure(); | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. gfx12 has an entirely different system, yes? Should we support that here, or somewhere else? There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Yes, it uses different instructions and I not very familiar with. So, the high level questions: can There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. From what I can tell, the gfx12 instructions are a more fine-grained version of pre-gfx12 ones, so that we can actually use the gfx12 categories and then combine them as needed for older architectures But that feels like it could be future work. (Though if you want to do it now, I might call it |
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} | ||
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struct MemoryCounterWaitOpLowering | ||
: public ConvertOpToLLVMPattern<MemoryCounterWaitOp> { | ||
MemoryCounterWaitOpLowering(const LLVMTypeConverter &converter, | ||
Chipset chipset) | ||
: ConvertOpToLLVMPattern<MemoryCounterWaitOp>(converter), | ||
chipset(chipset) {} | ||
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Chipset chipset; | ||
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LogicalResult | ||
matchAndRewrite(MemoryCounterWaitOp op, OpAdaptor adaptor, | ||
ConversionPatternRewriter &rewriter) const override { | ||
if (chipset.majorVersion >= 12) { | ||
Location loc = op.getLoc(); | ||
if (std::optional<int> ds = adaptor.getDs()) | ||
rewriter.create<ROCDL::WaitDscntOp>(loc, *ds); | ||
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if (std::optional<int> load = adaptor.getLoad()) | ||
rewriter.create<ROCDL::WaitLoadcntOp>(loc, *load); | ||
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if (std::optional<int> store = adaptor.getStore()) | ||
rewriter.create<ROCDL::WaitStorecntOp>(loc, *store); | ||
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if (std::optional<int> exp = adaptor.getExp()) | ||
rewriter.create<ROCDL::WaitExpcntOp>(loc, *exp); | ||
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rewriter.eraseOp(op); | ||
return success(); | ||
} | ||
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auto getVal = [](Attribute attr) -> unsigned { | ||
if (attr) | ||
return cast<IntegerAttr>(attr).getInt(); | ||
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// This value will be clamped to the maximum value for the chipset. | ||
return 1024; | ||
}; | ||
unsigned ds = getVal(adaptor.getDsAttr()); | ||
unsigned exp = getVal(adaptor.getExpAttr()); | ||
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unsigned vmcnt = 1024; | ||
Attribute load = adaptor.getLoadAttr(); | ||
Attribute store = adaptor.getStoreAttr(); | ||
if (load && store) { | ||
vmcnt = getVal(load) + getVal(store); | ||
} else if (load) { | ||
vmcnt = getVal(load); | ||
} else if (store) { | ||
vmcnt = getVal(store); | ||
} | ||
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FailureOr<unsigned> waitcnt = encodeWaitcnt(chipset, vmcnt, exp, ds); | ||
if (failed(waitcnt)) | ||
return op.emitOpError("unsupported chipset"); | ||
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rewriter.replaceOpWithNewOp<ROCDL::SWaitcntOp>(op, *waitcnt); | ||
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return success(); | ||
} | ||
}; | ||
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struct LDSBarrierOpLowering : public ConvertOpToLLVMPattern<LDSBarrierOp> { | ||
LDSBarrierOpLowering(const LLVMTypeConverter &converter, Chipset chipset) | ||
: ConvertOpToLLVMPattern<LDSBarrierOp>(converter), chipset(chipset) {} | ||
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@@ -1825,9 +1931,9 @@ void mlir::populateAMDGPUToROCDLConversionPatterns(LLVMTypeConverter &converter, | |
ROCDL::RawPtrBufferAtomicUminOp>, | ||
RawBufferOpLowering<RawBufferAtomicCmpswapOp, | ||
ROCDL::RawPtrBufferAtomicCmpSwap>, | ||
AMDGPUDPPLowering, LDSBarrierOpLowering, SchedBarrierOpLowering, | ||
MFMAOpLowering, ScaledMFMAOpLowering, WMMAOpLowering, | ||
ExtPackedFp8OpLowering, ScaledExtPackedOpLowering, | ||
AMDGPUDPPLowering, MemoryCounterWaitOpLowering, LDSBarrierOpLowering, | ||
SchedBarrierOpLowering, MFMAOpLowering, ScaledMFMAOpLowering, | ||
WMMAOpLowering, ExtPackedFp8OpLowering, ScaledExtPackedOpLowering, | ||
PackedScaledTruncOpLowering, PackedTrunc2xFp8OpLowering, | ||
PackedStochRoundFp8OpLowering, GatherToLDSOpLowering, | ||
TransposeLoadOpLowering>(converter, chipset); | ||
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,42 @@ | ||
// RUN: mlir-opt %s -convert-amdgpu-to-rocdl=chipset=gfx942 | FileCheck %s --check-prefixes=CHECK,GFX9 | ||
// RUN: mlir-opt %s -convert-amdgpu-to-rocdl=chipset=gfx1030 | FileCheck %s --check-prefixes=CHECK,GFX10 | ||
// RUN: mlir-opt %s -convert-amdgpu-to-rocdl=chipset=gfx1100 | FileCheck %s --check-prefixes=CHECK,GFX11 | ||
// RUN: mlir-opt %s -convert-amdgpu-to-rocdl=chipset=gfx1201 | FileCheck %s --check-prefixes=CHECK,GFX12 | ||
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// CHECK-LABEL: func @memory_counter_wait | ||
func.func @memory_counter_wait() { | ||
// GFX9: rocdl.s.waitcnt 53119 | ||
// GFX10: rocdl.s.waitcnt 65407 | ||
// GFX11: rocdl.s.waitcnt 65527 | ||
// GFX12-NOT: rocdl.s.wait.loadcnt | ||
// GFX12-NOT: rocdl.s.wait.storecnt | ||
// GFX12-NOT: rocdl.s.wait.expcnt | ||
// GFX12-NOT: rocdl.s.wait.dscnt | ||
amdgpu.memory_counter_wait | ||
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// GFX9: rocdl.s.waitcnt 3952 | ||
// GFX10: rocdl.s.waitcnt 16240 | ||
// GFX11: rocdl.s.waitcnt 1015 | ||
// GFX12: rocdl.s.wait.loadcnt 0 | ||
amdgpu.memory_counter_wait load(0) | ||
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// GFX9: rocdl.s.waitcnt 3952 | ||
// GFX10: rocdl.s.waitcnt 16240 | ||
// GFX11: rocdl.s.waitcnt 1015 | ||
// GFX12: rocdl.s.wait.storecnt 0 | ||
amdgpu.memory_counter_wait store(0) | ||
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// GFX9: rocdl.s.waitcnt 53007 | ||
// GFX10: rocdl.s.waitcnt 65295 | ||
// GFX11: rocdl.s.waitcnt 65520 | ||
// GFX12: rocdl.s.wait.expcnt 0 | ||
amdgpu.memory_counter_wait exp(0) | ||
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// GFX9: rocdl.s.waitcnt 49279 | ||
// GFX10: rocdl.s.waitcnt 49279 | ||
// GFX11: rocdl.s.waitcnt 64519 | ||
// GFX12: rocdl.s.wait.dscnt 0 | ||
amdgpu.memory_counter_wait ds(0) | ||
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return | ||
} |
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