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324bd15
[AArch64][GlobalISel] Add rax1.ll test converage. NFC
davemgreen Oct 20, 2025
5ac616f
[AArch64] Improve lowering of GPR zeroing in copyPhysReg (#163059)
tomershafir Oct 20, 2025
565e9fa
[mlir][docs] Add documentation for No-rollback Conversion Driver (#16…
matthias-springer Oct 20, 2025
ee50839
[InstSimplify] Support ptrtoaddr in simplifyCastInst()
nikic Oct 10, 2025
154138c
[SLP]Do not pack div-like copyable values
alexey-bataev Oct 20, 2025
74d77dc
[Clang][NFC] Rename UnqualPtrTy to DefaultPtrTy (#163207)
jmmartinez Oct 20, 2025
2e7afb1
[InstCombine] Move ptrtoaddr tests to InstSimplify (NFC)
nikic Oct 20, 2025
32de3b9
Revert "Reapply "[Clang] Enable lit internal shell by default""
boomanaiden154 Oct 20, 2025
3590a91
[flang][OpenMP] Frontend support for DEVICE_SAFESYNC (#163560)
kparzysz Oct 20, 2025
907335c
[mlir:python] Prevent crash in DenseElementsAttr. (#163564)
ingomueller-net Oct 20, 2025
0731f18
[SCEV] Add extra test coverage with URem & AddRec guards.
fhahn Oct 20, 2025
941d2fd
[acc][mlir] Add 'if-condition' to 'atomic' operations. (#164003)
erichkeane Oct 20, 2025
c0d731e
[flang][OpenACC] add TODO for unstructured loops in acc loop directiv…
jeanPerier Oct 20, 2025
c7da79e
[lldb] Remove a redundant call to std::unique_ptr<T>::get (NFC) (#164…
kazutakahirata Oct 20, 2025
385ea0d
[SCEV] Move and clarify names of prev/next divisor helpers (NFC).
fhahn Oct 20, 2025
7d356e9
[AArch64] Convert `CSEL(X, 1)` into `CSINC(X, XZR)` in early-ifcvt (#…
Il-Capitano Oct 20, 2025
fbc2d06
[NFC][SPIRV] Remove useless static_cast (#164239)
jmmartinez Oct 20, 2025
b9f9b3b
[SPIRV][NFC] Use DenseMap's lookup instead of find (#164237)
jmmartinez Oct 20, 2025
c8cf393
[mlgo][inliner] Handle recursive cases when skipping non-cold functio…
mtrofin Oct 20, 2025
6dda3b1
[flang][OpenMP]: Allow orphaned distribute construct (#163546)
chandraghale Oct 20, 2025
2ec549a
[GVNSink] Add support for ptrtoaddr
nikic Oct 20, 2025
4a5dbd5
[lldb-dap][NFC] avoid copy in launch process (#164243)
da-viper Oct 20, 2025
5a98392
[MLIR] Apply clang-tidy fixes for misc-use-internal-linkage in TypePa…
joker-eph Aug 21, 2025
cceca04
[SpeculativeExecution] Generate test checks (NFC)
nikic Oct 20, 2025
80b311a
[SpeculativeExecution] Add support for ptrtoaddr
nikic Oct 20, 2025
c332952
[clang][bytecode] Check param types against function prototype (#163920)
tbaederr Oct 20, 2025
2ecf122
[mlir][acc] Add utilities for acc dialect (#164022)
razvanlupusoru Oct 20, 2025
77ade89
[NFC] Use F->isDeclaration instead of (*F).isDeclaration (#164238)
jmmartinez Oct 20, 2025
38372df
[clang][analyzer] Add SyntaxRunningTime per-entry-point metric (#163341)
necto Oct 20, 2025
66b7d38
[NFC][SPIRV] Use hasLocalLinkage instead of hasInternalLinkage or has…
jmmartinez Oct 20, 2025
4e88280
[NFC][SPIRV] Use hasLocalLinage instead of manual comparison against …
jmmartinez Oct 20, 2025
d86da4e
[ADT] Prepare for deprecation of StringSwitch cases with 4+ args. NFC…
kuhar Oct 20, 2025
2d550b9
[Clang] Make Z3 Tests Work with Internal Shell
boomanaiden154 Oct 20, 2025
8c82606
[X86] Remove USER_MSR from DMR (#164232)
mikolaj-pirog Oct 20, 2025
5a112de
[MLIR][Python] expose translate_module_to_llvmir (#163881)
makslevental Oct 20, 2025
3d94f83
[X86] Update test to not iterate past array boundaries. (#163991)
juliannagele Oct 20, 2025
6b83e68
[gsymutil] Fix how invalid LLVM_stmt_seq is set and used (#164015)
DataCorrupted Oct 20, 2025
af4fbca
[mlir][SCF] Fix UB adjustment during `scf.for` loop peeling
ddubov100 Oct 20, 2025
7152d4e
[clang] Updates for support for Ubuntu, Debian and RHEL (#162796)
brad0 Oct 20, 2025
e25e43a
[AArch64] Remove trailing whitespace in IntrinsicsAArch64.td (NFC) (#…
MacDue Oct 20, 2025
a5bab28
[NFC][SPIRV] Move common SPIRV::LinkageType deduction code to a helpe…
jmmartinez Oct 20, 2025
58dd7a6
[LLVM][CodingStandard] Extend namespace qualifier rule to variables/c…
jurahul Oct 20, 2025
2bcb42f
[NFC][LLVM] Namespace cleanup in MSCVPaths (#163779)
jurahul Oct 20, 2025
6683f9b
[NFC][LLVM] Code cleanup in llvm-config.cpp (#163993)
jurahul Oct 20, 2025
39128b9
[NFC][LLVM] Code cleanup in `opt` (#164077)
jurahul Oct 20, 2025
6eb1ddf
[NFC][LLVM] Code cleanup in `llvm-xray` (#164080)
jurahul Oct 20, 2025
61ba312
[CIR] Upstream support ComplexType as return type (#164072)
AmrDeveloper Oct 20, 2025
cd05383
[CIR] Add Aggregate Expression LValue Visitors (#163410)
mmha Oct 20, 2025
e6a1aff
[runtimes][PAC] Harden unwinding when possible (#143230)
ojhunt Oct 20, 2025
aac8a0d
[CIR] Implement VisitCXXDefaultArgExpr for ComplexType (#164079)
AmrDeveloper Oct 20, 2025
3afbda0
[Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow…
monthdev Oct 20, 2025
725a297
[Headers][X86] Allow MMX/SSE/AVX MOVMSK intrinsics to be used in cons…
monthdev Oct 20, 2025
babecd4
[CIR] Add support for ternary operator as lvalue (#163580)
mmha Oct 20, 2025
737e116
[LLVM][Docs] Remove Stray %T Substitution
boomanaiden154 Oct 20, 2025
7a5446f
[CI] Add Initial Wiring for Premerge Advisor Explanations (#164132)
boomanaiden154 Oct 20, 2025
e10afe0
[Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow…
SeongjaeP Oct 20, 2025
d371417
[AMDGPU] Enable volatile and non-temporal for loads to LDS (#153244)
krzysz00 Oct 20, 2025
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63 changes: 63 additions & 0 deletions .ci/premerge_advisor_explain.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,63 @@
# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
# See https://llvm.org/LICENSE.txt for license information.
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
"""Script for getting explanations from the premerge advisor."""

import argparse
import os
import platform
import sys

import requests

import generate_test_report_lib

PREMERGE_ADVISOR_URL = (
"http://premerge-advisor.premerge-advisor.svc.cluster.local:5000/explain"
)


def main(commit_sha: str, build_log_files: list[str]):
junit_objects, ninja_logs = generate_test_report_lib.load_info_from_files(
build_log_files
)
test_failures = generate_test_report_lib.get_failures(junit_objects)
current_platform = f"{platform.system()}-{platform.machine()}".lower()
explanation_request = {
"base_commit_sha": commit_sha,
"platform": current_platform,
"failures": [],
}
if test_failures:
for _, failures in test_failures.items():
for name, failure_messsage in failures:
explanation_request["failures"].append(
{"name": name, "message": failure_messsage}
)
else:
ninja_failures = generate_test_report_lib.find_failure_in_ninja_logs(ninja_logs)
for name, failure_message in ninja_failures:
explanation_request["failures"].append(
{"name": name, "message": failure_message}
)
advisor_response = requests.get(PREMERGE_ADVISOR_URL, json=explanation_request)
if advisor_response.status_code == 200:
print(advisor_response.json())
else:
print(advisor_response.reason)


if __name__ == "__main__":
parser = argparse.ArgumentParser()
parser.add_argument("commit_sha", help="The base commit SHA for the test.")
parser.add_argument(
"build_log_files", help="Paths to JUnit report files and ninja logs.", nargs="*"
)
args = parser.parse_args()

# Skip looking for results on AArch64 for now because the premerge advisor
# service is not available on AWS currently.
if platform.machine() == "arm64":
sys.exit(0)

main(args.commit_sha, args.build_log_files)
5 changes: 5 additions & 0 deletions .ci/utils.sh
Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,11 @@ function at-exit {
python "${MONOREPO_ROOT}"/.ci/premerge_advisor_upload.py \
$(git rev-parse HEAD~1) $GITHUB_RUN_NUMBER \
"${BUILD_DIR}"/test-results.*.xml "${MONOREPO_ROOT}"/ninja*.log
if [[ "$GITHUB_ACTIONS" != "" ]]; then
python "${MONOREPO_ROOT}"/.ci/premerge_advisor_explain.py \
$(git rev-parse HEAD~1) "${BUILD_DIR}"/test-results.*.xml \
"${MONOREPO_ROOT}"/ninja*.log
fi
fi
}
trap at-exit EXIT
Expand Down
5 changes: 3 additions & 2 deletions bolt/lib/Rewrite/RewriteInstance.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2665,8 +2665,9 @@ void RewriteInstance::readRelocations(const SectionRef &Section) {
return;
}
const bool SkipRelocs = StringSwitch<bool>(RelocatedSectionName)
.Cases(".plt", ".rela.plt", ".got.plt",
".eh_frame", ".gcc_except_table", true)
.Cases({".plt", ".rela.plt", ".got.plt",
".eh_frame", ".gcc_except_table"},
true)
.Default(false);
if (SkipRelocs) {
LLVM_DEBUG(
Expand Down
46 changes: 21 additions & 25 deletions clang/include/clang/Basic/BuiltinsX86.td
Original file line number Diff line number Diff line change
Expand Up @@ -185,7 +185,8 @@ let Features = "sse", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in
def cvttss2si : X86Builtin<"int(_Vector<4, float>)">;
}

let Features = "sse", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
let Features = "sse",
Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
def movmskps : X86Builtin<"int(_Vector<4, float>)">;
}

Expand All @@ -211,11 +212,6 @@ let Features = "sse2", Attributes = [NoThrow, RequiredVectorWidth<128>] in {
def maskmovdqu : X86Builtin<"void(_Vector<16, char>, _Vector<16, char>, char *)">;
}

let Features = "sse2", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
def movmskpd : X86Builtin<"int(_Vector<2, double>)">;
def pmovmskb128 : X86Builtin<"int(_Vector<16, char>)">;
}

let Features = "sse2", Attributes = [NoThrow] in {
def movnti : X86Builtin<"void(int *, int)">;
}
Expand All @@ -224,6 +220,8 @@ let Features = "sse2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWi
def pshuflw : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Constant int)">;
def pshufd : X86Builtin<"_Vector<4, int>(_Vector<4, int>, _Constant int)">;
def pshufhw : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Constant int)">;
def movmskpd : X86Builtin<"int(_Vector<2, double>)">;
def pmovmskb128 : X86Builtin<"int(_Vector<16, char>)">;
}

let Features = "sse2", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in {
Expand Down Expand Up @@ -334,8 +332,8 @@ let Features = "sse4.1", Attributes = [NoThrow, Const, RequiredVectorWidth<128>]
def dpps : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Constant char)">;
def dppd : X86Builtin<"_Vector<2, double>(_Vector<2, double>, "
"_Vector<2,double>, _Constant char)">;
def mpsadbw128 : X86Builtin<"_Vector<16, char>(_Vector<16, char>, _Vector<16, char>, _Constant char)">;
def phminposuw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>)">;
def mpsadbw128 : X86Builtin<"_Vector<16, char>(_Vector<16, char>, "
"_Vector<16, char>, _Constant char)">;
}

let Features = "sse4.1",
Expand All @@ -358,6 +356,7 @@ let Features = "sse4.1", Attributes = [NoThrow, Const, Constexpr, RequiredVector

def pmuldq128 : X86Builtin<"_Vector<2, long long int>(_Vector<4, int>, _Vector<4, int>)">;
def packusdw128 : X86Builtin<"_Vector<8, short>(_Vector<4, int>, _Vector<4, int>)">;
def phminposuw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>)">;

def vec_ext_v16qi : X86Builtin<"char(_Vector<16, char>, _Constant int)">;
def vec_set_v16qi : X86Builtin<"_Vector<16, char>(_Vector<16, char>, char, _Constant int)">;
Expand Down Expand Up @@ -498,9 +497,6 @@ let Features = "avx", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in
def dpps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, float>, _Constant char)">;
def cmppd256 : X86Builtin<"_Vector<4, double>(_Vector<4, double>, _Vector<4, double>, _Constant char)">;
def cmpps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, float>, _Constant char)">;
def vextractf128_pd256 : X86Builtin<"_Vector<2, double>(_Vector<4, double>, _Constant int)">;
def vextractf128_ps256 : X86Builtin<"_Vector<4, float>(_Vector<8, float>, _Constant int)">;
def vextractf128_si256 : X86Builtin<"_Vector<4, int>(_Vector<8, int>, _Constant int)">;
def cvtpd2ps256 : X86Builtin<"_Vector<4, float>(_Vector<4, double>)">;
def cvtps2dq256 : X86Builtin<"_Vector<8, int>(_Vector<8, float>)">;
def cvttpd2dq256 : X86Builtin<"_Vector<4, int>(_Vector<4, double>)">;
Expand All @@ -521,6 +517,9 @@ let Features = "avx", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWid
def blendps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, float>, _Constant int)">;
def blendvpd256 : X86Builtin<"_Vector<4, double>(_Vector<4, double>, _Vector<4, double>, _Vector<4, double>)">;
def blendvps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, float>, _Vector<8, float>)">;
def vextractf128_pd256 : X86Builtin<"_Vector<2, double>(_Vector<4, double>, _Constant int)">;
def vextractf128_ps256 : X86Builtin<"_Vector<4, float>(_Vector<8, float>, _Constant int)">;
def vextractf128_si256 : X86Builtin<"_Vector<4, int>(_Vector<8, int>, _Constant int)">;
def vinsertf128_pd256 : X86Builtin<"_Vector<4, double>(_Vector<4, double>, _Vector<2, double>, _Constant int)">;
def vinsertf128_ps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<4, float>, _Constant int)">;
def vinsertf128_si256 : X86Builtin<"_Vector<8, int>(_Vector<8, int>, _Vector<4, int>, _Constant int)">;
Expand Down Expand Up @@ -562,11 +561,8 @@ let Features = "avx",
def vtestnzcps256 : X86Builtin<"int(_Vector<8, float>, _Vector<8, float>)">;
def ptestz256 : X86Builtin<"int(_Vector<4, long long int>, _Vector<4, long long int>)">;
def ptestc256 : X86Builtin<"int(_Vector<4, long long int>, _Vector<4, long long int>)">;
def ptestnzc256 : X86Builtin<"int(_Vector<4, long long int>, _Vector<4, long long int>)">;
}

let Features = "avx",
Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in {
def ptestnzc256
: X86Builtin<"int(_Vector<4, long long int>, _Vector<4, long long int>)">;
def movmskpd256 : X86Builtin<"int(_Vector<4, double>)">;
def movmskps256 : X86Builtin<"int(_Vector<8, float>)">;
}
Expand Down Expand Up @@ -605,9 +601,8 @@ let Features = "avx", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWid

let Features = "avx2", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in {
def mpsadbw256 : X86Builtin<"_Vector<32, char>(_Vector<32, char>, _Vector<32, char>, _Constant char)">;
def palignr256 : X86Builtin<"_Vector<32, char>(_Vector<32, char>, _Vector<32, char>, _Constant int)">;

def pmovmskb256 : X86Builtin<"int(_Vector<32, char>)">;
def palignr256 : X86Builtin<"_Vector<32, char>(_Vector<32, char>, "
"_Vector<32, char>, _Constant int)">;
def psadbw256 : X86Builtin<"_Vector<4, long long int>(_Vector<32, char>, _Vector<32, char>)">;
def psignb256 : X86Builtin<"_Vector<32, char>(_Vector<32, char>, _Vector<32, char>)">;
def psignw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">;
Expand All @@ -627,11 +622,11 @@ let Features = "avx2", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] i
def permvarsf256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, int>)">;
def permti256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long int>, _Vector<4, long long int>, _Constant int)">;
def permdi256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long int>, _Constant int)">;
def extract128i256 : X86Builtin<"_Vector<2, long long int>(_Vector<4, long long int>, _Constant int)">;
}


let Features = "avx2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
def pmovmskb256 : X86Builtin<"int(_Vector<32, char>)">;
def pavgb256 : X86Builtin<"_Vector<32, unsigned char>(_Vector<32, unsigned char>, _Vector<32, unsigned char>)">;
def pavgw256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, unsigned short>, _Vector<16, unsigned short>)">;

Expand Down Expand Up @@ -694,6 +689,7 @@ let Features = "avx2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWi
def psrlv4si : X86Builtin<"_Vector<4, int>(_Vector<4, int>, _Vector<4, int>)">;
def psllv2di : X86Builtin<"_Vector<2, long long int>(_Vector<2, long long int>, _Vector<2, long long int>)">;
def psrlv2di : X86Builtin<"_Vector<2, long long int>(_Vector<2, long long int>, _Vector<2, long long int>)">;
def extract128i256 : X86Builtin<"_Vector<2, long long int>(_Vector<4, long long int>, _Constant int)">;
}

let Features = "avx2", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
Expand Down Expand Up @@ -1095,7 +1091,7 @@ let Features = "avx512vl", Attributes = [NoThrow, Const, RequiredVectorWidth<256
def alignq256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long int>, _Vector<4, long long int>, _Constant int)">;
}

let Features = "avx512f", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in {
let Features = "avx512f", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
def extractf64x4_mask : X86Builtin<"_Vector<4, double>(_Vector<8, double>, _Constant int, _Vector<4, double>, unsigned char)">;
def extractf32x4_mask : X86Builtin<"_Vector<4, float>(_Vector<16, float>, _Constant int, _Vector<4, float>, unsigned char)">;
}
Expand Down Expand Up @@ -2960,24 +2956,24 @@ let Features = "avx512vl", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
def pmovqw256mem_mask : X86Builtin<"void(_Vector<8, short *>, _Vector<4, long long int>, unsigned char)">;
}

let Features = "avx512dq", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in {
let Features = "avx512dq", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
def extractf32x8_mask : X86Builtin<"_Vector<8, float>(_Vector<16, float>, _Constant int, _Vector<8, float>, unsigned char)">;
def extractf64x2_512_mask : X86Builtin<"_Vector<2, double>(_Vector<8, double>, _Constant int, _Vector<2, double>, unsigned char)">;
def extracti32x8_mask : X86Builtin<"_Vector<8, int>(_Vector<16, int>, _Constant int, _Vector<8, int>, unsigned char)">;
def extracti64x2_512_mask : X86Builtin<"_Vector<2, long long int>(_Vector<8, long long int>, _Constant int, _Vector<2, long long int>, unsigned char)">;
}

let Features = "avx512f", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in {
let Features = "avx512f", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
def extracti32x4_mask : X86Builtin<"_Vector<4, int>(_Vector<16, int>, _Constant int, _Vector<4, int>, unsigned char)">;
def extracti64x4_mask : X86Builtin<"_Vector<4, long long int>(_Vector<8, long long int>, _Constant int, _Vector<4, long long int>, unsigned char)">;
}

let Features = "avx512dq,avx512vl", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in {
let Features = "avx512dq,avx512vl", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
def extractf64x2_256_mask : X86Builtin<"_Vector<2, double>(_Vector<4, double>, _Constant int, _Vector<2, double>, unsigned char)">;
def extracti64x2_256_mask : X86Builtin<"_Vector<2, long long int>(_Vector<4, long long int>, _Constant int, _Vector<2, long long int>, unsigned char)">;
}

let Features = "avx512vl", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in {
let Features = "avx512vl", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
def extractf32x4_256_mask : X86Builtin<"_Vector<4, float>(_Vector<8, float>, _Constant int, _Vector<4, float>, unsigned char)">;
def extracti32x4_256_mask : X86Builtin<"_Vector<4, int>(_Vector<8, int>, _Constant int, _Vector<4, int>, unsigned char)">;
}
Expand Down
18 changes: 6 additions & 12 deletions clang/include/clang/Driver/Distro.h
Original file line number Diff line number Diff line change
Expand Up @@ -30,9 +30,6 @@ class Distro {
// the first and last known member in the family, e.g. IsRedHat().
AlpineLinux,
ArchLinux,
DebianLenny,
DebianSqueeze,
DebianWheezy,
DebianJessie,
DebianStretch,
DebianBuster,
Expand All @@ -42,16 +39,13 @@ class Distro {
DebianForky,
DebianDuke,
Exherbo,
RHEL5,
RHEL6,
RHEL7,
RHEL8,
RHEL9,
RHEL10,
Fedora,
Gentoo,
OpenSUSE,
UbuntuMaverick,
UbuntuNatty,
UbuntuOneiric,
UbuntuPrecise,
UbuntuQuantal,
UbuntuRaring,
UbuntuSaucy,
Expand Down Expand Up @@ -121,17 +115,17 @@ class Distro {
/// @{

bool IsRedhat() const {
return DistroVal == Fedora || (DistroVal >= RHEL5 && DistroVal <= RHEL7);
return DistroVal == Fedora || (DistroVal >= RHEL7 && DistroVal <= RHEL10);
}

bool IsOpenSUSE() const { return DistroVal == OpenSUSE; }

bool IsDebian() const {
return DistroVal >= DebianLenny && DistroVal <= DebianDuke;
return DistroVal >= DebianJessie && DistroVal <= DebianDuke;
}

bool IsUbuntu() const {
return DistroVal >= UbuntuMaverick && DistroVal <= UbuntuResolute;
return DistroVal >= UbuntuQuantal && DistroVal <= UbuntuResolute;
}

bool IsAlpineLinux() const { return DistroVal == AlpineLinux; }
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,9 @@ class FunctionSummariesTy {
/// The number of times the function has been inlined.
unsigned TimesInlined : 32;

/// Running time for syntax-based AST analysis in milliseconds.
std::optional<unsigned> SyntaxRunningTime = std::nullopt;

FunctionSummary()
: TotalBasicBlocks(0), InlineChecked(0), MayInline(0),
TimesInlined(0) {}
Expand All @@ -69,6 +72,11 @@ class FunctionSummariesTy {
return I;
}

FunctionSummary const *findSummary(const Decl *D) const {
auto I = Map.find(D);
return I == Map.end() ? nullptr : &I->second;
}

void markMayInline(const Decl *D) {
MapTy::iterator I = findOrInsertSummary(D);
I->second.InlineChecked = 1;
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7 changes: 6 additions & 1 deletion clang/lib/AST/ByteCode/Context.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -566,10 +566,15 @@ const Function *Context::getOrCreateFunction(const FunctionDecl *FuncDecl) {

// Assign descriptors to all parameters.
// Composite objects are lowered to pointers.
for (const ParmVarDecl *PD : FuncDecl->parameters()) {
const auto *FuncProto = FuncDecl->getType()->getAs<FunctionProtoType>();
for (auto [ParamIndex, PD] : llvm::enumerate(FuncDecl->parameters())) {
bool IsConst = PD->getType().isConstQualified();
bool IsVolatile = PD->getType().isVolatileQualified();

if (!getASTContext().hasSameType(PD->getType(),
FuncProto->getParamType(ParamIndex)))
return nullptr;

OptPrimType T = classify(PD->getType());
PrimType PT = T.value_or(PT_Ptr);
Descriptor *Desc = P->createDescriptor(PD, PT, nullptr, std::nullopt,
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