Skip to content

Add risc-v support #7

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 4 commits into from
Dec 14, 2024
Merged

Add risc-v support #7

Show file tree
Hide file tree
Changes from 3 commits
Commits
Show all changes
4 commits
Select commit Hold shift + click to select a range
08aab3e
Add risc-v support
diondokter Apr 20, 2024
4d6bee9
Improve CI and cfg
diondokter Apr 20, 2024
d140381
Move to target_arch
diondokter Dec 11, 2024
c8e3fd4
Remove feature flags and add rv64
diondokter Dec 13, 2024
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 2 additions & 2 deletions .github/workflows/ci.yml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -27,8 +27,8 @@ jobs:
cargo install cargo-binutils
rustup component add llvm-tools-preview
- name: Check
run: cargo check --target thumbv7em-none-eabi
run: cargo check --features cortex-m --target thumbv7em-none-eabi
- name: Clippy
run: cargo clippy --target thumbv7em-none-eabi
run: cargo clippy --features cortex-m --target thumbv7em-none-eabi
- name: Format
run: cargo fmt
2 changes: 2 additions & 0 deletions Cargo.toml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -15,3 +15,5 @@ default = ["erase-chip", "panic-handler"]
erase-chip = []
panic-handler = []
verify = []
cortex-m = []
risc-v = []
6 changes: 6 additions & 0 deletions src/lib.rs
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -15,8 +15,14 @@
#[cfg(all(not(test), feature = "panic-handler"))]
#[panic_handler]
fn panic(_info: &core::panic::PanicInfo) -> ! {
#[cfg(not(any(target_arch = "arm", target_arch = "riscv32")))]
compile_error!("Panic handler can only be compiled for arm and riscv32");

unsafe {
#[cfg(target_arch = "arm")]
core::arch::asm!("udf #0");
#[cfg(target_arch = "riscv32")]
core::arch::asm!("UNIMP");
core::hint::unreachable_unchecked();
}
}
Expand Down