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clk_reset_gen and Initial Value problem #13

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b7e7497
Fix clk_rst_gen parameter discrepancy
kaanari Jan 7, 2025
df5d344
Fix register golden model for non read only registers
kaanari Jan 7, 2025
319ee3d
Fix for apb write request with strobe
kaanari Jan 7, 2025
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6 changes: 1 addition & 5 deletions src/apb_regs.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -86,10 +86,6 @@ module apb_regs #(
apb_addr_t end_addr;
} rule_t;

logic has_reset_d, has_reset_q;
`FFARN(has_reset_q, has_reset_q, 1'b0, pclk_i, preset_ni)
assign has_reset_d = 1'b1;

// signal declarations
rule_t [NoApbRegs-1:0] addr_map;
idx_t reg_idx;
Expand All @@ -109,7 +105,7 @@ module apb_regs #(

always_comb begin
// default assignments
reg_d = has_reset_q ? reg_q : reg_init_i;
reg_d = reg_q;
reg_update = '0;
resp_o = '{
pready: req_i.psel & req_i.penable,
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6 changes: 3 additions & 3 deletions test/tb_apb_regs.sv
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Expand Up @@ -63,8 +63,8 @@ module tb_apb_regs;
// Clock generator
//-----------------------------------
clk_rst_gen #(
.CLK_PERIOD ( CyclTime ),
.RST_CLK_CYCLES( 5 )
.ClkPeriod ( CyclTime ),
.RstClkCycles( 5 )
) i_clk_gen (
.clk_o (clk),
.rst_no(rst_n)
Expand All @@ -86,7 +86,7 @@ module tb_apb_regs;
automatic reg_data_t init_val;
// initialize reset values and golden model
for (int unsigned i = 0; i < NoApbRegs; i++) begin
init_val = reg_data_t'($urandom());
init_val = ReadOnly[i] ? reg_data_t'($urandom()) : 32'd0;
reg_init[i] = init_val;
reg_compare[i] = init_val;
end
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