integration of new mxfp8 casting cuda kernel #2564

danielvegamyhre · 2025-07-16T21:14:45Z

Stacked PRs:

->integration of new mxfp8 casting cuda kernel #2564

integration of new mxfp8 casting cuda kernel

Summary

Integrating kernel added in #2513. Custom op wrapper was recently added in #2543. Remaining code to migrate from my private repo is in this PR:

Register sharding strategy for mxfp8_quantize_cuda custom op.
Add wrapper with Dtensor handling for mxfp8_quantize_cuda custom op
Update triton_scale_swizzle kernel to accept both row major and col major inputs (since cuda kernel writes scale in col major, to avoid uncoalesced global accesses)
Add MXFP8Dim1CastKernelChoice enum and replace all uses of boolean flag use_fp8_dim1_cast_triton_kernel with it. (Default to Triton for now)
Update tests accordingly and verify they are passing.

Test plan

pytest test/prototype/mx_formats/test_mx_linear.py -k eager_vs_hp
pytest test/prototype/mx_formats/test_mx_linear.py -k compile

Next steps

Integrate into torchtitan for e2e fsdp training tests once this stack lands. Torchtitan PR: [mxpf8] Make mxfp8 dim1 cast kernel configurable torchtitan#1401
Dtensor tests still having issues both with Triton and CUDA: ./test/prototype/mx_formats/test_mx_dtensor.sh: RuntimeError: Attempting to use FunctionalTensor on its own. Instead, please use it with a corresponding FunctionalTensorMode(). This is a known issue, will follow up on it.

stack-info: PR: #2564, branch: danielvegamyhre/stack/13

pytorch-bot · 2025-07-16T21:14:49Z

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stack-info: PR: #2564, branch: danielvegamyhre/stack/13

danielvegamyhre · 2025-07-16T22:52:47Z

@vkuzo @drisspg I squashed the remaining changes in the original stack into the same PR, so that the tests would be in the same PR as the changes.

drisspg · 2025-07-16T22:59:30Z

Didn't read any code yet:

Update triton_scale_swizzle kernel to accept both row major and col major inputs (since cuda kernel writes scale in col major, to avoid uncoalesced global accesses)

I think updating to just accept generically strided inputs and writing out row major (required for mm kernels) is good, is that what you did?

stack-info: PR: #2564, branch: danielvegamyhre/stack/13

danielvegamyhre · 2025-07-16T23:09:15Z

Didn't read any code yet:
Update triton_scale_swizzle kernel to accept both row major and col major inputs (since cuda kernel writes scale in col major, to avoid uncoalesced global accesses)
I think updating to just accept generically strided inputs and writing out row major (required for mm kernels) is good, is that what you did?

Yep, that's correct

stack-info: PR: #2564, branch: danielvegamyhre/stack/13

vkuzo · 2025-07-17T11:30:01Z

test/prototype/mx_formats/test_mx_dtensor.py

@@ -25,6 +25,7 @@
 from tqdm import tqdm

 from torchao.prototype.mx_formats import MXLinearConfig
+from torchao.prototype.mx_formats.config import MXFP8CastKernelChoice


sorry, MXFP8Dim1CastKernelChoice? since for dim0 we are always using torch.compile

It was originally MXFP8Dim1CastKernelChoice but here we discussed naming it MXFP8CastKernelChoice for potentially adding support for dim0 and dim0+dim1 casts as well. I don't have strong opinions either way, I went ahead and changed it back to MXFP8Dim1CastKernelChoice

vkuzo · 2025-07-17T11:31:07Z

torchao/prototype/mx_formats/config.py

@@ -33,6 +33,12 @@ class MXGemmKernelChoice(Enum):
    CUBLAS = "cublas"


+class MXFP8CastKernelChoice(Enum):


add some comments on what the options are?

vkuzo · 2025-07-17T11:32:37Z

torchao/prototype/mx_formats/mx_linear.py

+            a,
+            rowwise=False,
+            colwise=True,
+            scaling_mode="floor",


TODO for later to allow choice of scaling modes

Added todo on the custom op itself, with an explanation why we currently are using a string param

stack-info: PR: #2564, branch: danielvegamyhre/stack/13

Stacked PRs: * __->__#1427 --- --- --- make mxfp8 dim1 cast kernel configurable ## Summary - We recently added a new CUDA kernel for the mxfp8 dim1 cast which is ~1.4x faster than the existing Triton kernel or torch.compile, and using it results in an e2e training speedup of +1.5-2.5% TPS with Llama3 8b using FSDP=4/8 (pytorch/ao#2513). The integration work for composability with torch.compile + FSDP is complete as well: pytorch/ao#2564 - This PR updates the mxfp8 user facing API to replace the boolean flag `"--mx.use_triton_for_dim1_cast=[true|false]` to `mxfp8_dim1_cast_kernel_choice=[triton|cuda|torch]` ## Test plan - Triton: `NGPU=8 CONFIG_FILE="./torchtitan/models/llama3/train_configs/llama3_8b.toml" ./run_train.sh --training.steps=100 --model.converters="mx" --mx.recipe_name="mxfp8" --training.compile --mx.mxfp8_dim1_cast_kernel_choice="triton"` - Cuda: `NGPU=8 CONFIG_FILE="./torchtitan/models/llama3/train_configs/llama3_8b.toml" ./run_train.sh --training.steps=100 --model.converters="mx" --mx.recipe_name="mxfp8" --training.compile --mx.mxfp8_dim1_cast_kernel_choice="cuda"` - Torch: `NGPU=8 CONFIG_FILE="./torchtitan/models/llama3/train_configs/llama3_8b.toml" ./run_train.sh --training.steps=100 --model.converters="mx" --mx.recipe_name="mxfp8" --training.compile --mx.mxfp8_dim1_cast_kernel_choice="torch"` ## Limitations - TP is currently not supported yet, as both the Triton kernel and CUDA kernel are affected by an issue: `RuntimeError: Attempting to use FunctionalTensor on its own. Instead, please use it with a corresponding FunctionalTensorMode()`. This is a known issue we were talking to Brian about, will continue following up on it.

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integration of new mxfp8 casting cuda kernel

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integration of new mxfp8 casting cuda kernel

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integration of new mxfp8 casting cuda kernel

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integration of new mxfp8 casting cuda kernel

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stack-info: PR: #2564, branch: danielvegamyhre/stack/13

integration of new mxfp8 casting cuda kernel

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danielvegamyhre merged commit d828f91 into main Jul 18, 2025
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[mxpf8] Make mxfp8 dim1 cast kernel configurable pytorch/torchtitan#1401

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make mxfp8 dim1 cast kernel configurable pytorch/torchtitan#1427

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		@@ -33,6 +33,12 @@ class MXGemmKernelChoice(Enum):
		CUBLAS = "cublas"


		class MXFP8CastKernelChoice(Enum):

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