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The second draft of the Ssdtso extension was published recently:
https://lists.riscv.org/g/tech-arch-review/message/183
This PR adds support for this new extension.

Note, that the Ssdtso specification is in development state (i.e., not frozen or even ratified).

The Ssdtso extension adds a DTSO bit to the {m,s,h}envcfg
registers to enable TSO. Since Spike is sequentially consistent
it always operates TSO-compatible. Therefore, all we have to do
is make Spike aware of the extension (reading and writing the
{m,s,h}envcfg register already exists and we don't use the bit
inside of Spike anywhere).

For completeness, this patch also defines the {M,S,H}ENVCFG_DTSO
mask macros, even if they are not used anywhere.

Signed-off-by: Christoph Müllner <[email protected]>
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Let's wait til the riscv-opcodes PR is merged, but LGTM otherwise.

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2 participants