A curated collection of essential documentation, tutorials, research papers, and community links for Hardware Design Verification (DV) engineers and enthusiasts. Whether you're starting out or a seasoned pro, find valuable resources here to boost your DV journey!
- 🎓 Courses
- 🤝 Community Projects
- 🌐 Communities
- 🛡️ Hardware Security Verification
- 🏆 Hackathons
- 📚 Resources
- 📄 Papers
- 📰 Substack & Blogs
- ⚙️ Reverse Engineering
- 📚 Books
- 🔗 Nand2Tetris - Build a Computer from First Principles. Highly Recommended ⭐
- 🔗 MIT OpenCourseware - VLSI - MIT OpenCourseWare is an online publication of materials from over 2,500 MIT courses, freely sharing knowledge with learners and educators around the world. Highly Recommended ⭐
- 🔗 Namaste FPGA - Practical FPGA learning.
- 🔗 Verifsudha (YouTube) - SystemVerilog and UVM tutorials.
- 🔗 SystemVerilog Course Wiki (mbits-mirafra) - Comprehensive SystemVerilog course. Highly Recommended ⭐
- 🔗 SystemVerilog Homework (yuri-panchul) - Practice exercises for SystemVerilog.
- 🔗 SVUnit Introduction (Verification Academy) - Learn about the SVUnit testing framework.
- 🔗 Quick Silicon - VLSI training and resources.
- 🔗 Udemy Robin Garg - UPF Course
- 🔗 VLSI SYSTEM DESIGN
- 🔗 Onur Mutlu Lectures - Computer Arch
- 🔗 Smruti R. Sarangi - Computer Arch
- 🔗 SoC Labs - Global academic community for System On Chip development using the Arm-based ecosystem.
- 🔗 FOSSi Foundation - Free and Open Source Silicon Foundation.
- 🔗 Tiny Tapeout - Get your designs manufactured on a real chip! Great for learning.
- 🔗 Verilog Meetup - Community for Verilog enthusiasts.
- 🔗 BharatSemi
- 🔗 MicroArch Club - Discussions and resources on microarchitecture.
- 🔗 OpenHW Group (GitHub) - Open-source hardware development.
- 📄 Verification Techniques for Hardware Security (PDF) - Research paper on hardware security verification.
- 📹 Prof. Todd Austin (YouTube) - Lectures and insights on computer architecture and security.
- 🔗 Hack@DAC - Hardware Security Challenge Contest at the Design Automation Conference.
- 🔗 Makerchip - Community-driven open IC design challenges (Note: URL in original was makerchips.org).
- 🔗 Redwood EDA Showdown - Design competitions using TL-Verilog.
- 🔗 AXI VIP - AXI Verification IP.
- 🔗 CHIPS Alliance - Common Hardware for Interfaces, Processors and Systems.
- 🔗 Design Patterns in SV - Implementing design patterns in SystemVerilog.
- 🔗 Edalize - An abstraction library for interfacing EDA tools.
- 🔗 Ethernet MAC Core UVM Verification (10-Gigabit) - Example UVM project for a 10G Ethernet MAC.
- 🔗 Ibex UVM - UVM-based verification environment for the Ibex RISC-V core.
- 🔗 NoobsCpu-8bit - A simple 8-bit CPU architecture for learning.
- 🔗 OpenTitan DV - Design Verification environment for the OpenTitan project.
- 🔗 schoolRISCV - Step-by-step CPU microarchitecture development.
- 🔗 SV2V - SystemVerilog to Verilog converter.
- 🔗 VLSI Stuff - Ideas and EDA software for VLSI design.
- 🔗 VORTEX RISCV GPU - Vortex is a full-stack open-source RISC-V GPGPU.
- 🔗 VeRLPy - Python Library for Verification of Digital Designs with Reinforcement Learning
- 🔗 LLM4DV - LLM4DV is a benchmarking framework utilising large language models in hardware design verification.
- 🔗 Awesome HDL Languages - A curated list of amazingly awesome hardware description language projects.
- 🔗 awesome-open-hardware-verification - A List of Free and Open Source Hardware Verification Tools and Frameworks
- 🔗 RTL2UVM - Automated UVM TB generation with RTL
- 🔗 SoC-DV-UVM - SoC Verification with UVM
-
📹 What The Bug - Videos on debugging and verification concepts.
- 🔗 Awesome OpenSource SystemVerilog Projects - A curated list of open-source SV projects.
- 📄 How to Do Logging in UVM (CFS Vision) - Tips on UVM logging.
- 📄 Inheritance and Polymorphism of SystemVerilog OOP for UVM (EDN) - Article on SV OOP concepts for UVM.
- 🔗 Verification Explorer - Blog and resources on various verification topics.
- 🔗 Verification Guide - Tutorials and articles on SystemVerilog and UVM.
- 🔗 VLSI Resources - A hub for frontend VLSI learning materials.
- 🔗 WikiChip - WikiChip Fuse section publishes chips and semiconductor-related news
- 📄 Optimizing Design Verification using Machine Learning: Doing better than Random (arXiv)
- 📄 I Created the Verification Gap (DVCon)
- 📄 Designing Chips with AI (arXiv)
- 📄 eGPU (arXiv)
- 📄 LLM4DV (arXiv)
- 📄 veRLpy (arXiv)
- 📄 AssertLLM (arXiv)
- 📄 Optimizing Design Verification using Machine Learning: Doing better than Random (arXiv)
- 📄 DVCon Papers, Posters, Presentations and Video Archive
- 📄 SUNBURST DESIGN-UVM
- 📄 “Half-Fast” Bitcoin Miner: Open-Source Bitcoin Mining with FPGA
- 📄 Design Patterns by Example for SystemVerilog Verification Environments Enabled by SystemVerilog 1800-2012
- 📄 ASIC Design for Bitcoin Mining - Code
- 📄 High Frequency Trade Book Builder using FPGA
- 📄 HFT Book Builder Implemented on DE1-SOC FPGA board
- 📄 HFT Interview Preparation
- 📄 Deep Neural Network Hardware Accelerator - Highly Recommended ⭐
- 🔗 Reverse-engineering the vintage MC14500B - Fascinating look at a 1-bit processor.
- 📹 Reverse Engineering 101 (YouTube) - Introduction to reverse engineering.
- Practical UVM: Step by Step with IEEE 1800.2 - UVM
- The Elements of Computing Systems, second edition: Building a Modern Computer from First Principles
- SystemVerilog for Verification: A Guide to Learning the Testbench Language Features
- SystemVerilog Assertions Handbook, 4th Edition: ... for Dynamic and Formal Verification by Ben Cohen Srinivasan Venkataramanan Ajeetha Kumari Lisa Piper
- Python for RTL Verification: A complete course in Python, cocotb, and pyuvm
Spread the word and happy verifying! ✨