Skip to content

Conversation

@amin1377
Copy link
Contributor

There was a bug in the router when adding intra-cluster resources. Specifically, while retrieving the index of tile-level pins for blocks, there was an incorrect assumption that all sub-tile instances are of the same type. This PR fixes that bug and adds a clarifying comment to the function that returns this list.

To ensure the fix doesn’t introduce issues in existing architectures, I ran the titan_other benchmarks with the flat router enabled, and the results remained unchanged (as expected).

@github-actions github-actions bot added VPR VPR FPGA Placement & Routing Tool lang-cpp C/C++ code labels Nov 10, 2025
@amin1377
Copy link
Contributor Author

Titan other results (with flat routing enabled - runtime difference is mainly due to machine load):
Link

Copy link
Contributor

@soheilshahrouz soheilshahrouz left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Thansk Amin!

Is there a CI test for this?

@amin1377
Copy link
Contributor Author

@soheilshahrouz: Thanks! I’ve addressed your comments. We don’t have a test for this yet, but I’ve created an issue and will add one soon.

@amin1377 amin1377 merged commit 3ac0d07 into master Nov 11, 2025
30 checks passed
@amin1377 amin1377 deleted the intra_cluster_pins branch November 11, 2025 14:51
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

lang-cpp C/C++ code VPR VPR FPGA Placement & Routing Tool

Projects

None yet

Development

Successfully merging this pull request may close these issues.

3 participants