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example: Hazard3 CPU
Syntactic checks #1134: Pull request #626 synchronize by kroening
August 17, 2024 19:18 1m 16s Hazard3
August 17, 2024 19:18 1m 16s
Verilog: constant folding for reduction operators
Syntactic checks #1133: Pull request #629 synchronize by kroening
August 16, 2024 16:47 1m 24s reduction1
August 16, 2024 16:47 1m 24s
Verilog: Synthesis for indexed part select
Syntactic checks #1132: Pull request #636 synchronize by kroening
August 15, 2024 20:50 1m 59s synth-indexed-part-select
August 15, 2024 20:50 1m 59s
Verilog: Synthesis for indexed part select
Syntactic checks #1131: Pull request #636 synchronize by kroening
August 15, 2024 16:37 1m 24s synth-indexed-part-select
August 15, 2024 16:37 1m 24s
Verilog: fix synthesis for assignment to indexed part select
Syntactic checks #1130: Pull request #637 synchronize by kroening
August 14, 2024 21:22 1m 26s indexed-part-select5
August 14, 2024 21:22 1m 26s
Verilog: fix synthesis for assignment to indexed part select
Syntactic checks #1129: Pull request #637 synchronize by kroening
August 14, 2024 20:30 1m 22s indexed-part-select5
August 14, 2024 20:30 1m 22s
Verilog: fix synthesis for assignment to indexed part select
Syntactic checks #1128: Pull request #637 synchronize by kroening
August 14, 2024 20:26 1m 26s indexed-part-select5
August 14, 2024 20:26 1m 26s
Verilog: fix synthesis for assignment to indexed part select
Syntactic checks #1127: Pull request #637 synchronize by kroening
August 14, 2024 20:24 1m 30s indexed-part-select5
August 14, 2024 20:24 1m 30s
Verilog: fix synthesis for assignment to indexed part select
Syntactic checks #1126: Pull request #637 opened by kroening
August 14, 2024 19:06 1m 23s indexed-part-select5
August 14, 2024 19:06 1m 23s
Verilog: Synthesis for indexed part select
Syntactic checks #1125: Pull request #636 opened by kroening
August 14, 2024 19:01 1m 50s synth-indexed-part-select
August 14, 2024 19:01 1m 50s
verilog_synthesist::current_value can be const
Syntactic checks #1124: Pull request #633 synchronize by kroening
August 14, 2024 18:08 1m 28s current_value-const
August 14, 2024 18:08 1m 28s
Verilog: separate synthesis for LHS expressions
Syntactic checks #1123: Pull request #634 synchronize by kroening
August 14, 2024 18:05 1m 27s synth_lhs_expr
August 14, 2024 18:05 1m 27s
Verilog: separate synthesis for LHS expressions
Syntactic checks #1122: Pull request #634 synchronize by kroening
August 14, 2024 17:56 1m 35s synth_lhs_expr
August 14, 2024 17:56 1m 35s
Verilog: separate synthesis for LHS expressions
Syntactic checks #1121: Pull request #634 opened by kroening
August 14, 2024 17:26 1m 25s synth_lhs_expr
August 14, 2024 17:26 1m 25s
Verilog: extract verilog_synthesist::synthesis_constant
Syntactic checks #1120: Pull request #632 synchronize by kroening
August 14, 2024 17:13 1m 21s synthesis-constant
August 14, 2024 17:13 1m 21s
verilog_synthesist::current_value can be const
Syntactic checks #1119: Pull request #633 opened by kroening
August 14, 2024 17:09 1m 19s current_value-const
August 14, 2024 17:09 1m 19s
Verilog: extract verilog_synthesist::synthesis_constant
Syntactic checks #1118: Pull request #632 synchronize by kroening
August 14, 2024 17:03 1m 23s synthesis-constant
August 14, 2024 17:03 1m 23s
Verilog: extract verilog_synthesist::synthesis_constant
Syntactic checks #1117: Pull request #632 opened by kroening
August 14, 2024 16:50 2m 17s synthesis-constant
August 14, 2024 16:50 2m 17s
SystemVerilog: KNOWNBUG test for indexed part select lhs
Syntactic checks #1116: Pull request #631 opened by kroening
August 14, 2024 03:42 1m 20s indexed-part-select4
August 14, 2024 03:42 1m 20s
example: Hazard3 CPU
Syntactic checks #1115: Pull request #626 synchronize by kroening
August 14, 2024 02:57 1m 27s Hazard3
August 14, 2024 02:57 1m 27s
example: Hazard3 CPU
Syntactic checks #1114: Pull request #626 synchronize by kroening
August 13, 2024 19:01 1m 20s Hazard3
August 13, 2024 19:01 1m 20s
Verilog: constant folding for reduction operators
Syntactic checks #1113: Pull request #629 synchronize by kroening
August 13, 2024 18:01 2m 18s reduction1
August 13, 2024 18:01 2m 18s
Verilog: constant folding for reduction operators
Syntactic checks #1112: Pull request #629 synchronize by kroening
August 13, 2024 16:22 1m 33s reduction1
August 13, 2024 16:22 1m 33s
example: Hazard3 CPU
Syntactic checks #1111: Pull request #626 synchronize by kroening
August 13, 2024 00:02 1m 20s Hazard3
August 13, 2024 00:02 1m 20s
SystemVerilog: move expression grammar rules to Sec A.8.3
Syntactic checks #1110: Pull request #630 opened by kroening
August 10, 2024 15:07 1m 15s move-expression-grammar
August 10, 2024 15:07 1m 15s
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